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clang-p2996/llvm/lib/Target/AMDGPU
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Michael Bedy 80cf9ff564 Test commit - change comment slightly. 
llvm-svn: 327234
2018-03-11 03:27:50 +00:00
..
AsmParser
[AMDGPU][MC] Added lds support for MUBUF instructions
2018-02-21 13:13:48 +00:00
Disassembler
[AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier
2018-02-05 14:18:53 +00:00
InstPrinter
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MCTargetDesc
AMDGPU: Remove unused private member of AMDGPUTargetELFStreamer
2018-02-16 23:04:11 +00:00
TargetInfo
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Utils
[AMDGPU] Add default ISA version targets
2018-03-06 18:33:55 +00:00
AMDGPU.h
[AMDGPU] Change constant addr space to 4
2018-02-13 18:00:25 +00:00
AMDGPU.td
AMDGPU: Add fast fmaf feature to gfx702
2018-02-27 21:46:15 +00:00
AMDGPUAliasAnalysis.cpp
[AMDGPU] Change constant addr space to 4
2018-02-13 18:00:25 +00:00
AMDGPUAliasAnalysis.h
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPUAnnotateUniformValues.cpp
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AMDGPUArgumentUsageInfo.cpp
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AMDGPUArgumentUsageInfo.h
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AMDGPUAsmPrinter.cpp
[AMDGPU] do not generate .AMDGPU.config for amdpal os type
2018-02-06 13:39:38 +00:00
AMDGPUAsmPrinter.h
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AMDGPUCallingConv.td
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AMDGPUCallLowering.cpp
[AMDGPU] Change constant addr space to 4
2018-02-13 18:00:25 +00:00
AMDGPUCallLowering.h
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AMDGPUCodeGenPrepare.cpp
Reapply "AMDGPU: Add 32-bit constant address space"
2018-02-09 16:57:57 +00:00
AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUGenRegisterBankInfo.def
AMDGPU/GlobalISel: Use a more correct getValueMapping
2018-03-01 21:08:51 +00:00
AMDGPUInline.cpp
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AMDGPUInstrInfo.cpp
Reapply "AMDGPU: Add 32-bit constant address space"
2018-02-09 16:57:57 +00:00
AMDGPUInstrInfo.h
AMDGPU: Fix layering issue
2018-02-09 16:57:48 +00:00
AMDGPUInstrInfo.td
AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}
2018-01-31 20:18:04 +00:00
AMDGPUInstructions.td
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
2018-03-09 17:41:39 +00:00
AMDGPUInstructionSelector.cpp
Reapply "AMDGPU: Add 32-bit constant address space"
2018-02-09 16:57:57 +00:00
AMDGPUInstructionSelector.h
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AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
Revert: r327172 "Correct load-op-store cycle detection analysis"
2018-03-10 02:16:15 +00:00
AMDGPUISelLowering.cpp
Pass Divergence Analysis data to Selection DAG to drive divergence
2018-03-05 15:12:21 +00:00
AMDGPUISelLowering.h
AMDGPU: Fix build warning about override
2018-03-05 16:25:10 +00:00
AMDGPULegalizerInfo.cpp
AMDGPU/GlobalISel: Pass subtarget + TM to LegalizerInfo
2018-03-08 16:24:16 +00:00
AMDGPULegalizerInfo.h
AMDGPU/GlobalISel: Pass subtarget + TM to LegalizerInfo
2018-03-08 16:24:16 +00:00
AMDGPULibCalls.cpp
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AMDGPULibFunc.cpp
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AMDGPULibFunc.h
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AMDGPULowerIntrinsics.cpp
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AMDGPUMachineCFGStructurizer.cpp
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AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMachineModuleInfo.cpp
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AMDGPUMachineModuleInfo.h
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AMDGPUMacroFusion.cpp
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AMDGPUMacroFusion.h
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AMDGPUMCInstLower.cpp
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AMDGPUMCInstLower.h
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
[AMDGPU] Fix lowering OpenCL enqueue_kernel
2018-03-06 16:04:39 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp
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AMDGPUPromoteAlloca.cpp
AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements
2018-02-16 19:14:17 +00:00
AMDGPUPTNote.h
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AMDGPURegAsmNames.inc.cpp
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AMDGPURegisterBankInfo.cpp
AMDGPU/GlobalISel: Add InstrMapping for G_EXTRACT
2018-03-05 16:25:18 +00:00
AMDGPURegisterBankInfo.h
AMDGPU/GlobalISel: Define instruction mapping for G_OR
2018-03-01 21:25:25 +00:00
AMDGPURegisterBanks.td
AMDGPU/GlobalISel: Define InstrMappings for G_ICMP
2018-03-01 19:27:10 +00:00
AMDGPURegisterInfo.cpp
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
2018-01-24 18:09:53 +00:00
AMDGPURegisterInfo.h
[AMDGPU] Return true in enableMultipleCopyHints().
2018-02-17 10:00:28 +00:00
AMDGPURegisterInfo.td
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AMDGPURewriteOutArguments.cpp
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AMDGPUSubtarget.cpp
AMDGPU/GlobalISel: Pass subtarget + TM to LegalizerInfo
2018-03-08 16:24:16 +00:00
AMDGPUSubtarget.h
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
2018-03-09 17:41:39 +00:00
AMDGPUTargetMachine.cpp
[AMDGPU] Change constant addr space to 4
2018-02-13 18:00:25 +00:00
AMDGPUTargetMachine.h
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AMDGPUTargetObjectFile.cpp
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AMDGPUTargetObjectFile.h
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AMDGPUTargetTransformInfo.cpp
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
2018-03-09 17:41:39 +00:00
AMDGPUTargetTransformInfo.h
[AMDGPU] Increased vector length for global/constant loads.
2018-03-07 17:09:18 +00:00
AMDGPUUnifyDivergentExitNodes.cpp
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AMDGPUUnifyMetadata.cpp
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AMDILCFGStructurizer.cpp
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AMDKernelCodeT.h
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BUFInstructions.td
[AMDGPU][MC] Added lds support for MUBUF instructions
2018-02-21 13:13:48 +00:00
CaymanInstructions.td
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CMakeLists.txt
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DSInstructions.td
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
2018-03-09 17:41:39 +00:00
EvergreenInstructions.td
AMDGPU: Select BFI patterns with 64-bit ints
2018-02-07 00:21:34 +00:00
FLATInstructions.td
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GCNHazardRecognizer.cpp
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GCNHazardRecognizer.h
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GCNILPSched.cpp
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GCNIterativeScheduler.cpp
[NFC] fix trivial typos in comments and documents
2018-01-29 05:17:03 +00:00
GCNIterativeScheduler.h
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GCNMinRegStrategy.cpp
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GCNProcessors.td
AMDGPU: Bring processors and features in sync with the spec
2018-02-16 21:26:25 +00:00
GCNRegPressure.cpp
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GCNRegPressure.h
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GCNSchedStrategy.cpp
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GCNSchedStrategy.h
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LLVMBuild.txt
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MIMGInstructions.td
[AMDGPU][MC] Added support of 64-bit image atomics
2018-01-26 15:43:29 +00:00
R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600FrameLowering.cpp
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R600FrameLowering.h
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R600InstrFormats.td
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R600InstrInfo.cpp
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
2018-01-24 18:09:53 +00:00
R600InstrInfo.h
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
2018-01-24 18:09:53 +00:00
R600Instructions.td
AMDGPU: Move ADDRIndirect complex pattern into R600Instructions.td
2018-01-29 23:29:26 +00:00
R600Intrinsics.td
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R600ISelLowering.cpp
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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R600Processors.td
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R600RegisterInfo.cpp
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
2018-01-24 18:09:53 +00:00
R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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SIDebuggerInsertNops.cpp
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SIDefines.h
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SIFixSGPRCopies.cpp
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SIFixVGPRCopies.cpp
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SIFixWWMLiveness.cpp
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SIFoldOperands.cpp
AMDGPU: Fix crash when constant folding with physreg operand
2018-03-10 16:05:35 +00:00
SIFrameLowering.cpp
[AMDGPU] Scratch setup fix on AMDPAL gfx9+ merge shader
2018-02-26 14:46:43 +00:00
SIFrameLowering.h
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SIInsertSkips.cpp
Fix compiler warning introduced in r325931. NFC.
2018-02-23 19:11:33 +00:00
SIInsertWaitcnts.cpp
[AMDGPU] Make note of existing waitcnt instrs; this is add-on work related to suppression of redundant waitcnt instrs. It is necessary to make note of these existing waitcnt instrs so that we do not fall into an infinite loop when handling loops. Also, [NFC] some minor code clean-up.
2018-02-19 19:19:59 +00:00
SIInsertWaits.cpp
[NFC] fix trivial typos in comments
2018-02-22 07:48:29 +00:00
SIInstrFormats.td
[MachineOperand][Target] MachineOperand::isRenamable semantics changes
2018-02-23 18:25:08 +00:00
SIInstrInfo.cpp
[AMDGPU] added writelane intrinsic
2018-02-28 19:10:32 +00:00
SIInstrInfo.h
[AMDGPU][MC] Added lds support for MUBUF instructions
2018-02-21 13:13:48 +00:00
SIInstrInfo.td
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
2018-03-09 17:41:39 +00:00
SIInstructions.td
AMDGPU/GCN: Promote i16 ctpop
2018-03-02 02:50:22 +00:00
SIIntrinsics.td
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SIISelLowering.cpp
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
2018-03-09 17:41:39 +00:00
SIISelLowering.h
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SILoadStoreOptimizer.cpp
AMDGPU: Track physreg uses in SILoadStoreOptimizer
2018-02-23 10:45:56 +00:00
SILowerControlFlow.cpp
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SILowerI1Copies.cpp
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SIMachineFunctionInfo.cpp
Reapply "AMDGPU: Add 32-bit constant address space"
2018-02-09 16:57:57 +00:00
SIMachineFunctionInfo.h
[AMDGPU] stop buffer_store being moved illegally
2018-02-20 10:03:38 +00:00
SIMachineScheduler.cpp
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SIMachineScheduler.h
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SIMemoryLegalizer.cpp
[AMDGPU] More descriptive names in the memory legalizer
2018-02-09 06:05:33 +00:00
SIOptimizeExecMasking.cpp
[MachineOperand][Target] MachineOperand::isRenamable semantics changes
2018-02-23 18:25:08 +00:00
SIOptimizeExecMaskingPreRA.cpp
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SIPeepholeSDWA.cpp
Test commit - change comment slightly.
2018-03-11 03:27:50 +00:00
SIRegisterInfo.cpp
[AMDGPU] : fix for the crash in SIRegisterInfo when the regiser class not found
2018-03-01 17:36:43 +00:00
SIRegisterInfo.h
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
2018-01-24 18:09:53 +00:00
SIRegisterInfo.td
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SISchedule.td
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SIShrinkInstructions.cpp
[AMDGPU] Shrinking V_SUBBREV_U32
2018-02-24 01:32:32 +00:00
SIWholeQuadMode.cpp
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SMInstructions.td
Pass Divergence Analysis data to Selection DAG to drive divergence
2018-03-05 15:12:21 +00:00
SOPInstructions.td
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VIInstrFormats.td
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VIInstructions.td
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VOP1Instructions.td
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VOP2Instructions.td
[AMDGPU] added writelane intrinsic
2018-02-28 19:10:32 +00:00
VOP3Instructions.td
[AMDGPU] Fixed V_DIV_FIXUP_F16 selection on GFX9
2018-03-09 07:21:43 +00:00
VOP3PInstructions.td
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VOPCInstructions.td
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VOPInstructions.td
[MachineOperand][Target] MachineOperand::isRenamable semantics changes
2018-02-23 18:25:08 +00:00