This infrastructure has proven proven its worth, so give it a more prominent place. My immediate motivation for this is the desire to reuse this infrastructure for qemu platform testing, but I believe this move makes sense independently of that. Moving this code to the packages tree will allow as to add more structure to the gdb client tests -- currently they are all crammed into the same test folder as that was the only way they could access this code. I'm splitting the code into two parts while moving it. The first once contains just the generic gdb protocol wrappers, while the other one contains the unit test glue. The reason for that is that for qemu testing, I need to run the gdb code in a separate process, so I will only be using the first part there. Differential Revision: https://reviews.llvm.org/D113893
100 lines
4.2 KiB
Python
100 lines
4.2 KiB
Python
from __future__ import print_function
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import lldb
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from lldbsuite.test.lldbtest import *
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from lldbsuite.test.decorators import *
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from lldbsuite.test.gdbclientutils import *
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from lldbsuite.test.lldbgdbclient import GDBRemoteTestBase
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# This test case is testing three things:
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#
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# 1. three register values will be provided in the ? stop packet (T11) -
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# registers 0 ("rax"), 1 ("rbx"), and 3 ("rip")
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# 2. ReadRegister packet will provide the value of register 2 ("rsi")
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# 3. The "g" read-all-registers packet is not supported; p must be used
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# to get the value of register 2 ("rsi")
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#
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# Forcing lldb to use the expedited registers in the stop packet and
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# marking it an error to request that register value is to prevent
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# performance regressions.
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#
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# Some gdb RSP stubs only implement p/P, they do not support g/G.
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# lldb must be able to work with either.
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class TestNoGPacketSupported(GDBRemoteTestBase):
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mydir = TestBase.compute_mydir(__file__)
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@skipIfXmlSupportMissing
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def test(self):
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class MyResponder(MockGDBServerResponder):
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def haltReason(self):
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return "T02thread:1ff0d;threads:1ff0d;thread-pcs:000000010001bc00;00:7882773ce0ffffff;01:1122334455667788;03:00bc010001000000;"
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def threadStopInfo(self, threadnum):
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return "T02thread:1ff0d;threads:1ff0d;thread-pcs:000000010001bc00;00:7882773ce0ffffff;01:1122334455667788;03:00bc010001000000;"
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def writeRegisters(self):
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return "E02"
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def readRegisters(self):
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return "E01"
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def readRegister(self, regnum):
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# lldb will try sending "p0" to see if the p packet is supported,
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# give a bogus value; in theory lldb could use this value in the
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# register context and that would be valid behavior.
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# notably, don't give values for registers 1 & 3 -- lldb should
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# get those from the ? stop packet ("T11") and it is a pref regression
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# if lldb is asking for these register values.
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if regnum == 0:
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return "5555555555555555"
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if regnum == 2:
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return "c04825ebfe7f0000" # 0x00007ffeeb2548c0
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return "E03"
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def writeRegister(self, regnum):
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return "OK"
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def qXferRead(self, obj, annex, offset, length):
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if annex == "target.xml":
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return """<?xml version="1.0"?>
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<target version="1.0">
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<architecture>i386:x86-64</architecture>
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<feature name="org.gnu.gdb.i386.core">
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<reg name="rax" bitsize="64" regnum="0" type="code_ptr" group="general"/>
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<reg name="rbx" bitsize="64" regnum="1" type="code_ptr" group="general"/>
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<reg name="rsi" bitsize="64" regnum="2" type="code_ptr" group="general"/>
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<reg name="rip" bitsize="64" regnum="3" type="code_ptr" group="general" altname="pc" generic="pc"/>
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</feature>
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</target>""", False
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else:
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return None, False
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self.server.responder = MyResponder()
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target = self.dbg.CreateTarget('')
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if self.TraceOn():
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self.runCmd("log enable gdb-remote packets")
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self.addTearDownHook(
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lambda: self.runCmd("log disable gdb-remote packets"))
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process = self.connect(target)
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thread = process.GetThreadAtIndex(0)
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frame = thread.GetFrameAtIndex(0)
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rax = frame.FindRegister("rax").GetValueAsUnsigned()
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rbx = frame.FindRegister("rbx").GetValueAsUnsigned()
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rsi = frame.FindRegister("rsi").GetValueAsUnsigned()
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pc = frame.GetPC()
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rip = frame.FindRegister("rip").GetValueAsUnsigned()
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if self.TraceOn():
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print("Register values: rax == 0x%x, rbx == 0x%x, rsi == 0x%x, pc == 0x%x, rip == 0x%x" % (rax, rbx, rsi, pc, rip))
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self.assertEqual(rax, 0xffffffe03c778278)
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self.assertEqual(rbx, 0x8877665544332211)
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self.assertEqual(rsi, 0x00007ffeeb2548c0)
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self.assertEqual(pc, 0x10001bc00)
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self.assertEqual(rip, 0x10001bc00)
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