38a022623a
This is the last general step to allow more IR-level speculation with a safety harness in place in CodeGenPrepare. The intent is to restore the behavior enabled by: http://reviews.llvm.org/rL228826 but prevent bad performance such as: https://llvm.org/bugs/show_bug.cgi?id=24818 Earlier patches in this sequence: D12882 (disable SimplifyCFG speculation for expensive instructions) D13297 (have CGP despeculate expensive ops) D14630 (have CGP despeculate special versions of cttz/ctlz) As shown in the test cases, we only have two instructions currently affected: ctz for some x86 and fdiv generally. Allowing exactly one expensive instruction is a bit of a hack, but it lines up with what is currently implemented in CGP. If we make the despeculation more general in CGP, we can make the speculation here more liberal. A follow-up patch will adjust the cost for sqrt and possibly other typically expensive math intrinsics (currently everything is cheap by default). GPU targets would likely want to override those expensive default costs (just as they probably should already override the cost of div/rem) because just about any math is cheaper than control-flow on those targets. Differential Revision: http://reviews.llvm.org/D15213 llvm-svn: 255660
130 lines
4.8 KiB
LLVM
130 lines
4.8 KiB
LLVM
; RUN: opt -S -simplifycfg < %s | FileCheck %s --check-prefix=EXPENSIVE --check-prefix=ALL
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; RUN: opt -S -simplifycfg -speculate-one-expensive-inst=false < %s | FileCheck %s --check-prefix=CHEAP --check-prefix=ALL
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declare float @llvm.sqrt.f32(float) nounwind readonly
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declare float @llvm.fma.f32(float, float, float) nounwind readonly
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declare float @llvm.fmuladd.f32(float, float, float) nounwind readonly
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declare float @llvm.fabs.f32(float) nounwind readonly
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declare float @llvm.minnum.f32(float, float) nounwind readonly
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declare float @llvm.maxnum.f32(float, float) nounwind readonly
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; ALL-LABEL: @fdiv_test(
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; EXPENSIVE: select i1 %cmp, double %div, double 0.0
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; CHEAP-NOT: select
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define double @fdiv_test(double %a, double %b) {
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entry:
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%cmp = fcmp ogt double %a, 0.0
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br i1 %cmp, label %cond.true, label %cond.end
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cond.true:
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%div = fdiv double %b, %a
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br label %cond.end
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cond.end:
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%cond = phi double [ %div, %cond.true ], [ 0.0, %entry ]
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ret double %cond
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}
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; ALL-LABEL: @sqrt_test(
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; ALL: select
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define void @sqrt_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_sqrt.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.sqrt.f32(float %a) nounwind readnone
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br label %test_sqrt.exit
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test_sqrt.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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; ALL-LABEL: @fabs_test(
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; ALL: select
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define void @fabs_test(float addrspace(1)* noalias nocapture %out, float %a) nounwind {
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_fabs.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.fabs.f32(float %a) nounwind readnone
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br label %test_fabs.exit
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test_fabs.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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; ALL-LABEL: @fma_test(
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; ALL: select
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define void @fma_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_fma.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone
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br label %test_fma.exit
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test_fma.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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; ALL-LABEL: @fmuladd_test(
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; ALL: select
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define void @fmuladd_test(float addrspace(1)* noalias nocapture %out, float %a, float %b, float %c) nounwind {
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_fmuladd.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.fmuladd.f32(float %a, float %b, float %c) nounwind readnone
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br label %test_fmuladd.exit
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test_fmuladd.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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; ALL-LABEL: @minnum_test(
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; ALL: select
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define void @minnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_minnum.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.minnum.f32(float %a, float %b) nounwind readnone
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br label %test_minnum.exit
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test_minnum.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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; ALL-LABEL: @maxnum_test(
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; ALL: select
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define void @maxnum_test(float addrspace(1)* noalias nocapture %out, float %a, float %b) nounwind {
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entry:
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%cmp.i = fcmp olt float %a, 0.000000e+00
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br i1 %cmp.i, label %test_maxnum.exit, label %cond.else.i
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cond.else.i: ; preds = %entry
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%0 = tail call float @llvm.maxnum.f32(float %a, float %b) nounwind readnone
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br label %test_maxnum.exit
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test_maxnum.exit: ; preds = %cond.else.i, %entry
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%cond.i = phi float [ %0, %cond.else.i ], [ 0x7FF8000000000000, %entry ]
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store float %cond.i, float addrspace(1)* %out, align 4
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ret void
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}
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