aa2009fe78
First step after e113317958,
in these tests, DomTree is valid afterwards, so mark them as such,
so that they don't regress.
In further steps, SimplifyCFG transforms shall taught to preserve DomTree,
in as small steps as possible.
30 lines
1.5 KiB
LLVM
30 lines
1.5 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -loop-vectorize -simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN %s
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; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -loop-vectorize -pass-remarks-analysis='loop-vectorize' < %s 2>&1 | FileCheck -check-prefixes=REMARK %s
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; GCN-LABEL: @runtime_check_divergent_target(
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; GCN-NOT: load <2 x half>
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; GCN-NOT: store <2 x half>
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; REMARK: remark: <unknown>:0:0: loop not vectorized: runtime pointer checks needed. Not enabled for divergent target
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define amdgpu_kernel void @runtime_check_divergent_target(half addrspace(1)* nocapture %a, half addrspace(1)* nocapture %b) #0 {
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds half, half addrspace(1)* %b, i64 %indvars.iv
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%load = load half, half addrspace(1)* %arrayidx, align 4
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%mul = fmul half %load, 3.0
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%arrayidx2 = getelementptr inbounds half, half addrspace(1)* %a, i64 %indvars.iv
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store half %mul, half addrspace(1)* %arrayidx2, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 1024
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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attributes #0 = { nounwind }
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