86478c6909
This patch vectorizes the v2i64/v4i64 ASHR shift operations - the last remaining integer vector shifts that are still being transferred to/from the scalar unit to be completed. Differential Revision: http://reviews.llvm.org/D11439 llvm-svn: 243569
129 lines
3.4 KiB
LLVM
129 lines
3.4 KiB
LLVM
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 | FileCheck %s --check-prefix=SSE3
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX2
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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define i32 @add(i32 %arg) {
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;CHECK: cost of 1 {{.*}} add
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%A = add <4 x i32> undef, undef
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;CHECK: cost of 4 {{.*}} add
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%B = add <8 x i32> undef, undef
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;CHECK: cost of 1 {{.*}} add
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%C = add <2 x i64> undef, undef
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;CHECK: cost of 4 {{.*}} add
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%D = add <4 x i64> undef, undef
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;CHECK: cost of 8 {{.*}} add
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%E = add <8 x i64> undef, undef
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;CHECK: cost of 0 {{.*}} ret
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ret i32 undef
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}
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define i32 @xor(i32 %arg) {
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;CHECK: cost of 1 {{.*}} xor
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%A = xor <4 x i32> undef, undef
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;CHECK: cost of 1 {{.*}} xor
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%B = xor <8 x i32> undef, undef
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;CHECK: cost of 1 {{.*}} xor
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%C = xor <2 x i64> undef, undef
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;CHECK: cost of 1 {{.*}} xor
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%D = xor <4 x i64> undef, undef
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;CHECK: cost of 0 {{.*}} ret
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ret i32 undef
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}
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; CHECK: mul
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define void @mul() {
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; A <2 x i32> gets expanded to a <2 x i64> vector.
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; A <2 x i64> vector multiply is implemented using
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; 3 PMULUDQ and 2 PADDS and 4 shifts.
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;CHECK: cost of 9 {{.*}} mul
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%A0 = mul <2 x i32> undef, undef
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;CHECK: cost of 9 {{.*}} mul
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%A1 = mul <2 x i64> undef, undef
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;CHECK: cost of 18 {{.*}} mul
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%A2 = mul <4 x i64> undef, undef
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ret void
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}
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; SSE3: sse3mull
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define void @sse3mull() {
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; SSE3: cost of 6 {{.*}} mul
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%A0 = mul <4 x i32> undef, undef
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ret void
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; SSE3: avx2mull
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}
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; AVX2: avx2mull
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define void @avx2mull() {
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; AVX2: cost of 9 {{.*}} mul
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%A0 = mul <4 x i64> undef, undef
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ret void
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; AVX2: fmul
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}
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; CHECK: fmul
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define i32 @fmul(i32 %arg) {
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;CHECK: cost of 2 {{.*}} fmul
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%A = fmul <4 x float> undef, undef
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;CHECK: cost of 2 {{.*}} fmul
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%B = fmul <8 x float> undef, undef
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ret i32 undef
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}
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; AVX: shift
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; AVX2: shift
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define void @shift() {
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; AVX: cost of 2 {{.*}} shl
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; AVX2: cost of 1 {{.*}} shl
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%A0 = shl <4 x i32> undef, undef
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; AVX: cost of 2 {{.*}} shl
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; AVX2: cost of 1 {{.*}} shl
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%A1 = shl <2 x i64> undef, undef
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; AVX: cost of 2 {{.*}} lshr
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; AVX2: cost of 1 {{.*}} lshr
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%B0 = lshr <4 x i32> undef, undef
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; AVX: cost of 2 {{.*}} lshr
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; AVX2: cost of 1 {{.*}} lshr
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%B1 = lshr <2 x i64> undef, undef
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; AVX: cost of 2 {{.*}} ashr
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; AVX2: cost of 1 {{.*}} ashr
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%C0 = ashr <4 x i32> undef, undef
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; AVX: cost of 6 {{.*}} ashr
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; AVX2: cost of 4 {{.*}} ashr
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%C1 = ashr <2 x i64> undef, undef
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ret void
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}
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; AVX: avx2shift
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; AVX2: avx2shift
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define void @avx2shift() {
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; AVX: cost of 2 {{.*}} shl
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; AVX2: cost of 1 {{.*}} shl
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%A0 = shl <8 x i32> undef, undef
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; AVX: cost of 2 {{.*}} shl
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; AVX2: cost of 1 {{.*}} shl
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%A1 = shl <4 x i64> undef, undef
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; AVX: cost of 2 {{.*}} lshr
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; AVX2: cost of 1 {{.*}} lshr
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%B0 = lshr <8 x i32> undef, undef
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; AVX: cost of 2 {{.*}} lshr
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; AVX2: cost of 1 {{.*}} lshr
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%B1 = lshr <4 x i64> undef, undef
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; AVX: cost of 2 {{.*}} ashr
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; AVX2: cost of 1 {{.*}} ashr
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%C0 = ashr <8 x i32> undef, undef
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; AVX: cost of 12 {{.*}} ashr
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; AVX2: cost of 4 {{.*}} ashr
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%C1 = ashr <4 x i64> undef, undef
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ret void
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}
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