e69a3d18f4
Provide minimal register definition defaults for working with servers that implement neither target.xml nor qRegisterInfo packets. This is useful e.g. when interacting with FreeBSD's kernel minimal gdbserver that does not send target.xml but uses the same layout for its supported register subset as GDB. The prerequisite for this is the ability to determine the correct architecture, e.g. from the target executable. Differential Revision: https://reviews.llvm.org/D116896
87 lines
2.9 KiB
C++
87 lines
2.9 KiB
C++
//===-- GDBRemoteRegisterFallback.cpp -------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "GDBRemoteRegisterFallback.h"
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namespace lldb_private {
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namespace process_gdb_remote {
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#define REG(name, size) \
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DynamicRegisterInfo::Register { \
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ConstString(#name), empty_alt_name, reg_set, size, LLDB_INVALID_INDEX32, \
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lldb::eEncodingUint, lldb::eFormatHex, LLDB_INVALID_REGNUM, \
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LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, {}, {} \
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}
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#define R64(name) REG(name, 8)
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#define R32(name) REG(name, 4)
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static std::vector<DynamicRegisterInfo::Register> GetRegisters_aarch64() {
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ConstString empty_alt_name;
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ConstString reg_set{"general purpose registers"};
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std::vector<DynamicRegisterInfo::Register> registers{
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R64(x0), R64(x1), R64(x2), R64(x3), R64(x4), R64(x5), R64(x6),
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R64(x7), R64(x8), R64(x9), R64(x10), R64(x11), R64(x12), R64(x13),
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R64(x14), R64(x15), R64(x16), R64(x17), R64(x18), R64(x19), R64(x20),
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R64(x21), R64(x22), R64(x23), R64(x24), R64(x25), R64(x26), R64(x27),
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R64(x28), R64(x29), R64(x30), R64(sp), R64(pc), R32(cpsr),
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};
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return registers;
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}
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static std::vector<DynamicRegisterInfo::Register> GetRegisters_x86() {
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ConstString empty_alt_name;
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ConstString reg_set{"general purpose registers"};
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std::vector<DynamicRegisterInfo::Register> registers{
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R32(eax), R32(ecx), R32(edx), R32(ebx), R32(esp), R32(ebp),
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R32(esi), R32(edi), R32(eip), R32(eflags), R32(cs), R32(ss),
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R32(ds), R32(es), R32(fs), R32(gs),
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};
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return registers;
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}
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static std::vector<DynamicRegisterInfo::Register> GetRegisters_x86_64() {
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ConstString empty_alt_name;
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ConstString reg_set{"general purpose registers"};
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std::vector<DynamicRegisterInfo::Register> registers{
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R64(rax), R64(rbx), R64(rcx), R64(rdx), R64(rsi), R64(rdi),
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R64(rbp), R64(rsp), R64(r8), R64(r9), R64(r10), R64(r11),
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R64(r12), R64(r13), R64(r14), R64(r15), R64(rip), R32(eflags),
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R32(cs), R32(ss), R32(ds), R32(es), R32(fs), R32(gs),
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};
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return registers;
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}
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#undef R32
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#undef R64
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#undef REG
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std::vector<DynamicRegisterInfo::Register>
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GetFallbackRegisters(const ArchSpec &arch_to_use) {
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switch (arch_to_use.GetMachine()) {
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case llvm::Triple::aarch64:
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return GetRegisters_aarch64();
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case llvm::Triple::x86:
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return GetRegisters_x86();
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case llvm::Triple::x86_64:
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return GetRegisters_x86_64();
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default:
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break;
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}
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return {};
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}
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} // namespace process_gdb_remote
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} // namespace lldb_private
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