e75e50c045
The function took either StringRef or Twine. Since string literals are
ambiguous when resolving the overloading, many code calls used this
function with explicit type conversion. That led awkward code like
make_dynamic_error_code(Twine("Error occurred")).
This patch adds a function definition for string literals, so that
you can directly call the function with literals.
llvm-svn: 234841
640 lines
20 KiB
C++
640 lines
20 KiB
C++
//===- lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp ----------------===//
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//
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// The LLVM Linker
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsLinkingContext.h"
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#include "MipsRelocationHandler.h"
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#include "MipsTargetLayout.h"
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using namespace lld;
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using namespace elf;
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using namespace llvm::ELF;
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using namespace llvm::support;
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namespace {
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enum class CrossJumpMode {
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None, // Not a jump or non-isa-cross jump
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ToRegular, // cross isa jump to regular symbol
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ToMicro // cross isa jump to microMips symbol
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};
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struct MipsRelocationParams {
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uint8_t _size; // Relocations's size in bytes
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uint64_t _mask; // Read/write mask of relocation
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uint8_t _shift; // Relocation's addendum left shift size
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bool _shuffle; // Relocation's addendum/result needs to be shuffled
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};
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template <class ELFT> class RelocationHandler : public TargetRelocationHandler {
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public:
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RelocationHandler(MipsLinkingContext &ctx, MipsTargetLayout<ELFT> &layout)
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: _ctx(ctx), _targetLayout(layout) {}
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std::error_code applyRelocation(ELFWriter &writer,
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llvm::FileOutputBuffer &buf,
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const lld::AtomLayout &atom,
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const Reference &ref) const override;
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private:
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MipsLinkingContext &_ctx;
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MipsTargetLayout<ELFT> &_targetLayout;
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};
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}
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static MipsRelocationParams getRelocationParams(uint32_t rType) {
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switch (rType) {
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case R_MIPS_NONE:
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return {4, 0x0, 0, false};
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case R_MIPS_64:
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case R_MIPS_SUB:
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return {8, 0xffffffffffffffffull, 0, false};
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case R_MIPS_32:
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case R_MIPS_GPREL32:
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case R_MIPS_PC32:
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case R_MIPS_EH:
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return {4, 0xffffffff, 0, false};
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case LLD_R_MIPS_32_HI16:
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return {4, 0xffff0000, 0, false};
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case LLD_R_MIPS_64_HI16:
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return {8, 0xffffffffffff0000ull, 0, false};
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case R_MIPS_26:
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case LLD_R_MIPS_GLOBAL_26:
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return {4, 0x3ffffff, 2, false};
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case R_MIPS_PC18_S3:
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return {4, 0x3ffff, 3, false};
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case R_MIPS_PC19_S2:
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return {4, 0x7ffff, 2, false};
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case R_MIPS_PC21_S2:
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return {4, 0x1fffff, 2, false};
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case R_MIPS_PC26_S2:
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return {4, 0x3ffffff, 2, false};
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case R_MIPS_HI16:
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case R_MIPS_LO16:
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case R_MIPS_PCHI16:
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case R_MIPS_PCLO16:
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case R_MIPS_GPREL16:
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case R_MIPS_GOT16:
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case R_MIPS_GOT_DISP:
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case R_MIPS_GOT_PAGE:
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case R_MIPS_GOT_OFST:
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case R_MIPS_GOT_HI16:
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case R_MIPS_GOT_LO16:
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case R_MIPS_CALL_HI16:
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case R_MIPS_CALL_LO16:
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case R_MIPS_TLS_DTPREL_HI16:
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case R_MIPS_TLS_DTPREL_LO16:
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case R_MIPS_TLS_TPREL_HI16:
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case R_MIPS_TLS_TPREL_LO16:
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case LLD_R_MIPS_HI16:
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case LLD_R_MIPS_LO16:
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return {4, 0xffff, 0, false};
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case R_MICROMIPS_TLS_DTPREL_HI16:
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case R_MICROMIPS_TLS_DTPREL_LO16:
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case R_MICROMIPS_TLS_TPREL_HI16:
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case R_MICROMIPS_TLS_TPREL_LO16:
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return {4, 0xffff, 0, true};
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case R_MICROMIPS_26_S1:
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case LLD_R_MICROMIPS_GLOBAL_26_S1:
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return {4, 0x3ffffff, 1, true};
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case R_MICROMIPS_HI16:
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case R_MICROMIPS_LO16:
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case R_MICROMIPS_GOT16:
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return {4, 0xffff, 0, true};
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case R_MICROMIPS_PC16_S1:
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return {4, 0xffff, 1, true};
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case R_MICROMIPS_PC7_S1:
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return {4, 0x7f, 1, false};
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case R_MICROMIPS_PC10_S1:
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return {4, 0x3ff, 1, false};
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case R_MICROMIPS_PC23_S2:
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return {4, 0x7fffff, 2, true};
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case R_MIPS_CALL16:
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case R_MIPS_TLS_GD:
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case R_MIPS_TLS_LDM:
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case R_MIPS_TLS_GOTTPREL:
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return {4, 0xffff, 0, false};
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case R_MICROMIPS_CALL16:
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case R_MICROMIPS_TLS_GD:
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case R_MICROMIPS_TLS_LDM:
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case R_MICROMIPS_TLS_GOTTPREL:
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case R_MICROMIPS_GOT_HI16:
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case R_MICROMIPS_GOT_LO16:
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case R_MICROMIPS_CALL_HI16:
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case R_MICROMIPS_CALL_LO16:
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return {4, 0xffff, 0, true};
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case R_MIPS_JALR:
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return {4, 0x0, 0, false};
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case R_MICROMIPS_JALR:
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return {4, 0x0, 0, true};
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case R_MIPS_REL32:
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return {4, 0xffffffff, 0, false};
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case R_MIPS_JUMP_SLOT:
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case R_MIPS_COPY:
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case R_MIPS_TLS_DTPMOD32:
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case R_MIPS_TLS_DTPREL32:
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case R_MIPS_TLS_TPREL32:
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// Ignore runtime relocations.
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return {4, 0x0, 0, false};
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case R_MIPS_TLS_DTPMOD64:
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case R_MIPS_TLS_DTPREL64:
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case R_MIPS_TLS_TPREL64:
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return {8, 0x0, 0, false};
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case LLD_R_MIPS_GLOBAL_GOT:
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case LLD_R_MIPS_STO_PLT:
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// Do nothing.
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return {4, 0x0, 0, false};
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default:
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llvm_unreachable("Unknown relocation");
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}
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}
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/// \brief R_MIPS_32
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/// local/external: word32 S + A (truncate)
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static uint32_t reloc32(uint64_t S, int64_t A) { return S + A; }
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/// \brief R_MIPS_64
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/// local/external: word64 S + A (truncate)
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static uint64_t reloc64(uint64_t S, int64_t A) { return S + A; }
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/// \brief R_MIPS_SUB
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/// local/external: word64 S - A (truncate)
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static uint64_t relocSub(uint64_t S, int64_t A) { return S - A; }
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/// \brief R_MIPS_PC32
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/// local/external: word32 S + A - P (truncate)
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static uint32_t relocpc32(uint64_t P, uint64_t S, int64_t A) {
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return S + A - P;
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}
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/// \brief R_MIPS_26, R_MICROMIPS_26_S1
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/// local : ((A | ((P + 4) & 0x3F000000)) + S) >> 2
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static uint32_t reloc26loc(uint64_t P, uint64_t S, int32_t A, uint32_t shift) {
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uint32_t result = (A | ((P + 4) & (0xfc000000 << shift))) + S;
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return result >> shift;
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}
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/// \brief LLD_R_MIPS_GLOBAL_26, LLD_R_MICROMIPS_GLOBAL_26_S1
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/// external: (sign-extend(A) + S) >> 2
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static uint32_t reloc26ext(uint64_t S, int32_t A, uint32_t shift) {
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int32_t result =
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shift == 1 ? llvm::SignExtend32<27>(A) : llvm::SignExtend32<28>(A);
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return (result + S) >> shift;
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}
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/// \brief R_MIPS_HI16, R_MIPS_TLS_DTPREL_HI16, R_MIPS_TLS_TPREL_HI16,
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/// R_MICROMIPS_HI16, R_MICROMIPS_TLS_DTPREL_HI16, R_MICROMIPS_TLS_TPREL_HI16,
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/// LLD_R_MIPS_HI16
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/// local/external: hi16 (AHL + S) - (short)(AHL + S) (truncate)
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/// _gp_disp : hi16 (AHL + GP - P) - (short)(AHL + GP - P) (verify)
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static uint32_t relocHi16(uint64_t P, uint64_t S, int64_t AHL, bool isGPDisp) {
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int32_t result = isGPDisp ? AHL + S - P : AHL + S;
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return (result + 0x8000) >> 16;
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}
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/// \brief R_MIPS_PCHI16
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/// local/external: hi16 (S + AHL - P)
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static uint32_t relocPcHi16(uint64_t P, uint64_t S, int64_t AHL) {
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int32_t result = S + AHL - P;
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return (result + 0x8000) >> 16;
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}
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/// \brief R_MIPS_LO16, R_MIPS_TLS_DTPREL_LO16, R_MIPS_TLS_TPREL_LO16,
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/// R_MICROMIPS_LO16, R_MICROMIPS_TLS_DTPREL_LO16, R_MICROMIPS_TLS_TPREL_LO16,
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/// LLD_R_MIPS_LO16
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/// local/external: lo16 AHL + S (truncate)
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/// _gp_disp : lo16 AHL + GP - P + 4 (verify)
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static uint32_t relocLo16(uint64_t P, uint64_t S, int64_t AHL, bool isGPDisp,
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bool micro) {
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int32_t result = isGPDisp ? AHL + S - P + (micro ? 3 : 4) : AHL + S;
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return result;
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}
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/// \brief R_MIPS_PCLO16
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/// local/external: lo16 (S + AHL - P)
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static uint32_t relocPcLo16(uint64_t P, uint64_t S, int64_t AHL) {
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AHL = llvm::SignExtend32<16>(AHL);
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int32_t result = S + AHL - P;
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return result;
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}
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/// \brief R_MIPS_GOT16, R_MIPS_CALL16, R_MICROMIPS_GOT16, R_MICROMIPS_CALL16
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/// rel16 G (verify)
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static uint64_t relocGOT(uint64_t S, uint64_t GP) {
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int64_t G = (int64_t)(S - GP);
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return G;
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}
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/// \brief R_MIPS_GOT_LO16, R_MIPS_CALL_LO16
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/// R_MICROMIPS_GOT_LO16, R_MICROMIPS_CALL_LO16
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/// rel16 G (truncate)
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static uint64_t relocGOTLo16(uint64_t S, uint64_t GP) {
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return S - GP;
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}
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/// \brief R_MIPS_GOT_HI16, R_MIPS_CALL_HI16,
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/// R_MICROMIPS_GOT_HI16, R_MICROMIPS_CALL_HI16
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/// rel16 %high(G) (truncate)
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static uint64_t relocGOTHi16(uint64_t S, uint64_t GP) {
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return (S - GP + 0x8000) >> 16;
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}
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/// R_MIPS_GOT_OFST
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/// rel16 offset of (S+A) from the page pointer (verify)
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static uint32_t relocGOTOfst(uint64_t S, int64_t A) {
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uint64_t page = (S + A + 0x8000) & ~0xffff;
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return S + A - page;
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}
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/// \brief R_MIPS_GPREL16
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/// local: sign-extend(A) + S + GP0 - GP
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/// external: sign-extend(A) + S - GP
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static uint64_t relocGPRel16(uint64_t S, int64_t A, uint64_t GP) {
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// We added GP0 to addendum for a local symbol during a Relocation pass.
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return llvm::SignExtend32<16>(A) + S - GP;
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}
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/// \brief R_MIPS_GPREL32
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/// local: rel32 A + S + GP0 - GP (truncate)
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static uint64_t relocGPRel32(uint64_t S, int64_t A, uint64_t GP) {
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// We added GP0 to addendum for a local symbol during a Relocation pass.
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return A + S - GP;
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}
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/// \brief R_MIPS_PC18_S3
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/// local/external: (S + A - P) >> 3 (P with cleared 3 less significant bits)
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static uint32_t relocPc18(uint64_t P, uint64_t S, int64_t A) {
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A = llvm::SignExtend32<21>(A);
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// FIXME (simon): Check that S + A has 8-byte alignment
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int32_t result = S + A - ((P | 7) ^ 7);
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return result >> 3;
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}
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/// \brief R_MIPS_PC19_S2
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/// local/external: (S + A - P) >> 2
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static uint32_t relocPc19(uint64_t P, uint64_t S, int64_t A) {
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A = llvm::SignExtend32<21>(A);
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// FIXME (simon): Check that S + A has 4-byte alignment
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int32_t result = S + A - P;
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return result >> 2;
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}
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/// \brief R_MIPS_PC21_S2
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/// local/external: (S + A - P) >> 2
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static uint32_t relocPc21(uint64_t P, uint64_t S, int64_t A) {
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A = llvm::SignExtend32<23>(A);
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// FIXME (simon): Check that S + A has 4-byte alignment
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int32_t result = S + A - P;
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return result >> 2;
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}
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/// \brief R_MIPS_PC26_S2
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/// local/external: (S + A - P) >> 2
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static uint32_t relocPc26(uint64_t P, uint64_t S, int64_t A) {
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A = llvm::SignExtend32<28>(A);
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// FIXME (simon): Check that S + A has 4-byte alignment
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int32_t result = S + A - P;
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return result >> 2;
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}
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/// \brief R_MICROMIPS_PC7_S1
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static uint32_t relocPc7(uint64_t P, uint64_t S, int64_t A) {
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A = llvm::SignExtend32<8>(A);
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int32_t result = S + A - P;
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return result >> 1;
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}
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/// \brief R_MICROMIPS_PC10_S1
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static uint32_t relocPc10(uint64_t P, uint64_t S, int64_t A) {
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A = llvm::SignExtend32<11>(A);
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int32_t result = S + A - P;
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return result >> 1;
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}
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/// \brief R_MICROMIPS_PC16_S1
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static uint32_t relocPc16(uint64_t P, uint64_t S, int64_t A) {
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A = llvm::SignExtend32<17>(A);
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int32_t result = S + A - P;
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return result >> 1;
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}
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/// \brief R_MICROMIPS_PC23_S2
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static uint32_t relocPc23(uint64_t P, uint64_t S, int64_t A) {
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A = llvm::SignExtend32<25>(A);
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int32_t result = S + A - P;
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// Check addiupc 16MB range.
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if (result + 0x1000000 >= 0x2000000)
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llvm::errs() << "The addiupc instruction immediate "
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<< llvm::format_hex(result, 10) << " is out of range.\n";
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return result >> 2;
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}
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/// \brief LLD_R_MIPS_32_HI16, LLD_R_MIPS_64_HI16
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static uint64_t relocMaskLow16(uint64_t S, int64_t A) {
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return S + A + 0x8000;
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}
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static std::error_code adjustJumpOpCode(uint64_t &ins, uint64_t tgt,
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CrossJumpMode mode) {
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if (mode == CrossJumpMode::None)
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return std::error_code();
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bool toMicro = mode == CrossJumpMode::ToMicro;
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uint32_t opNative = toMicro ? 0x03 : 0x3d;
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uint32_t opCross = toMicro ? 0x1d : 0x3c;
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if ((tgt & 1) != toMicro)
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return make_dynamic_error_code("Incorrect bit 0 for the jalx target");
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if (tgt & 2)
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return make_dynamic_error_code(Twine("The jalx target 0x") +
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Twine::utohexstr(tgt) +
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" is not word-aligned");
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uint8_t op = ins >> 26;
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if (op != opNative && op != opCross)
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return make_dynamic_error_code(Twine("Unsupported jump opcode (0x") +
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Twine::utohexstr(op) +
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") for ISA modes cross call");
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ins = (ins & ~(0x3f << 26)) | (opCross << 26);
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return std::error_code();
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}
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static bool isMicroMipsAtom(const Atom *a) {
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if (const auto *da = dyn_cast<DefinedAtom>(a))
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return da->codeModel() == DefinedAtom::codeMipsMicro ||
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da->codeModel() == DefinedAtom::codeMipsMicroPIC;
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return false;
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}
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static CrossJumpMode getCrossJumpMode(const Reference &ref) {
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if (!isa<DefinedAtom>(ref.target()))
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return CrossJumpMode::None;
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bool isTgtMicro = isMicroMipsAtom(ref.target());
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switch (ref.kindValue()) {
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case R_MIPS_26:
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case LLD_R_MIPS_GLOBAL_26:
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return isTgtMicro ? CrossJumpMode::ToMicro : CrossJumpMode::None;
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case R_MICROMIPS_26_S1:
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case LLD_R_MICROMIPS_GLOBAL_26_S1:
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return isTgtMicro ? CrossJumpMode::None : CrossJumpMode::ToRegular;
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default:
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return CrossJumpMode::None;
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}
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}
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static uint32_t microShuffle(uint32_t ins) {
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return ((ins & 0xffff) << 16) | ((ins & 0xffff0000) >> 16);
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}
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static ErrorOr<uint64_t> calculateRelocation(Reference::KindValue kind,
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Reference::Addend addend,
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uint64_t tgtAddr, uint64_t relAddr,
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uint64_t gpAddr, bool isGP,
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CrossJumpMode jumpMode) {
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bool isCrossJump = jumpMode != CrossJumpMode::None;
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switch (kind) {
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case R_MIPS_NONE:
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return 0;
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case R_MIPS_32:
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return reloc32(tgtAddr, addend);
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case R_MIPS_64:
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return reloc64(tgtAddr, addend);
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case R_MIPS_SUB:
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return relocSub(tgtAddr, addend);
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case R_MIPS_26:
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return reloc26loc(relAddr, tgtAddr, addend, 2);
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case R_MICROMIPS_26_S1:
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return reloc26loc(relAddr, tgtAddr, addend, isCrossJump ? 2 : 1);
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case R_MIPS_HI16:
|
|
case R_MICROMIPS_HI16:
|
|
return relocHi16(relAddr, tgtAddr, addend, isGP);
|
|
case R_MIPS_PCHI16:
|
|
return relocPcHi16(relAddr, tgtAddr, addend);
|
|
case R_MIPS_LO16:
|
|
return relocLo16(relAddr, tgtAddr, addend, isGP, false);
|
|
case R_MIPS_PCLO16:
|
|
return relocPcLo16(relAddr, tgtAddr, addend);
|
|
case R_MICROMIPS_LO16:
|
|
return relocLo16(relAddr, tgtAddr, addend, isGP, true);
|
|
case R_MIPS_GOT_LO16:
|
|
case R_MIPS_CALL_LO16:
|
|
case R_MICROMIPS_GOT_LO16:
|
|
case R_MICROMIPS_CALL_LO16:
|
|
return relocGOTLo16(tgtAddr, gpAddr);
|
|
case R_MIPS_GOT_HI16:
|
|
case R_MIPS_CALL_HI16:
|
|
case R_MICROMIPS_GOT_HI16:
|
|
case R_MICROMIPS_CALL_HI16:
|
|
return relocGOTHi16(tgtAddr, gpAddr);
|
|
case R_MIPS_EH:
|
|
case R_MIPS_GOT16:
|
|
case R_MIPS_CALL16:
|
|
case R_MIPS_GOT_DISP:
|
|
case R_MIPS_GOT_PAGE:
|
|
case R_MICROMIPS_GOT16:
|
|
case R_MICROMIPS_CALL16:
|
|
case R_MIPS_TLS_GD:
|
|
case R_MIPS_TLS_LDM:
|
|
case R_MIPS_TLS_GOTTPREL:
|
|
case R_MICROMIPS_TLS_GD:
|
|
case R_MICROMIPS_TLS_LDM:
|
|
case R_MICROMIPS_TLS_GOTTPREL:
|
|
return relocGOT(tgtAddr, gpAddr);
|
|
case R_MIPS_GOT_OFST:
|
|
return relocGOTOfst(tgtAddr, addend);
|
|
case R_MIPS_PC18_S3:
|
|
return relocPc18(relAddr, tgtAddr, addend);
|
|
case R_MIPS_PC19_S2:
|
|
return relocPc19(relAddr, tgtAddr, addend);
|
|
case R_MIPS_PC21_S2:
|
|
return relocPc21(relAddr, tgtAddr, addend);
|
|
case R_MIPS_PC26_S2:
|
|
return relocPc26(relAddr, tgtAddr, addend);
|
|
case R_MICROMIPS_PC7_S1:
|
|
return relocPc7(relAddr, tgtAddr, addend);
|
|
case R_MICROMIPS_PC10_S1:
|
|
return relocPc10(relAddr, tgtAddr, addend);
|
|
case R_MICROMIPS_PC16_S1:
|
|
return relocPc16(relAddr, tgtAddr, addend);
|
|
case R_MICROMIPS_PC23_S2:
|
|
return relocPc23(relAddr, tgtAddr, addend);
|
|
case R_MIPS_TLS_DTPREL_HI16:
|
|
case R_MIPS_TLS_TPREL_HI16:
|
|
case R_MICROMIPS_TLS_DTPREL_HI16:
|
|
case R_MICROMIPS_TLS_TPREL_HI16:
|
|
return relocHi16(0, tgtAddr, addend, false);
|
|
case R_MIPS_TLS_DTPREL_LO16:
|
|
case R_MIPS_TLS_TPREL_LO16:
|
|
return relocLo16(0, tgtAddr, addend, false, false);
|
|
case R_MICROMIPS_TLS_DTPREL_LO16:
|
|
case R_MICROMIPS_TLS_TPREL_LO16:
|
|
return relocLo16(0, tgtAddr, addend, false, true);
|
|
case R_MIPS_GPREL16:
|
|
return relocGPRel16(tgtAddr, addend, gpAddr);
|
|
case R_MIPS_GPREL32:
|
|
return relocGPRel32(tgtAddr, addend, gpAddr);
|
|
case R_MIPS_JALR:
|
|
case R_MICROMIPS_JALR:
|
|
// We do not do JALR optimization now.
|
|
return 0;
|
|
case R_MIPS_REL32:
|
|
case R_MIPS_JUMP_SLOT:
|
|
case R_MIPS_COPY:
|
|
case R_MIPS_TLS_DTPMOD32:
|
|
case R_MIPS_TLS_DTPREL32:
|
|
case R_MIPS_TLS_TPREL32:
|
|
case R_MIPS_TLS_DTPMOD64:
|
|
case R_MIPS_TLS_DTPREL64:
|
|
case R_MIPS_TLS_TPREL64:
|
|
// Ignore runtime relocations.
|
|
return 0;
|
|
case R_MIPS_PC32:
|
|
return relocpc32(relAddr, tgtAddr, addend);
|
|
case LLD_R_MIPS_GLOBAL_GOT:
|
|
// Do nothing.
|
|
case LLD_R_MIPS_32_HI16:
|
|
case LLD_R_MIPS_64_HI16:
|
|
return relocMaskLow16(tgtAddr, addend);
|
|
case LLD_R_MIPS_GLOBAL_26:
|
|
return reloc26ext(tgtAddr, addend, 2);
|
|
case LLD_R_MICROMIPS_GLOBAL_26_S1:
|
|
return reloc26ext(tgtAddr, addend, isCrossJump ? 2 : 1);
|
|
case LLD_R_MIPS_HI16:
|
|
return relocHi16(0, tgtAddr, 0, false);
|
|
case LLD_R_MIPS_LO16:
|
|
return relocLo16(0, tgtAddr, 0, false, false);
|
|
case LLD_R_MIPS_STO_PLT:
|
|
// Do nothing.
|
|
return 0;
|
|
default:
|
|
return make_unhandled_reloc_error();
|
|
}
|
|
}
|
|
|
|
static uint64_t relocRead(const MipsRelocationParams ¶ms,
|
|
const uint8_t *loc) {
|
|
uint64_t data;
|
|
switch (params._size) {
|
|
case 4:
|
|
data = endian::read32le(loc);
|
|
break;
|
|
case 8:
|
|
data = endian::read64le(loc);
|
|
break;
|
|
default:
|
|
llvm_unreachable("Unexpected size");
|
|
}
|
|
if (params._shuffle)
|
|
data = microShuffle(data);
|
|
return data;
|
|
}
|
|
|
|
template <class ELFT>
|
|
static void relocWrite(uint64_t data, const MipsRelocationParams ¶ms,
|
|
uint8_t *loc) {
|
|
if (params._shuffle)
|
|
data = microShuffle(data);
|
|
switch (params._size) {
|
|
case 4:
|
|
endian::write<uint32_t, ELFT::TargetEndianness, unaligned>(loc, data);
|
|
break;
|
|
case 8:
|
|
endian::write<uint64_t, ELFT::TargetEndianness, unaligned>(loc, data);
|
|
break;
|
|
default:
|
|
llvm_unreachable("Unexpected size");
|
|
}
|
|
}
|
|
|
|
template <class ELFT>
|
|
std::error_code RelocationHandler<ELFT>::applyRelocation(
|
|
ELFWriter &writer, llvm::FileOutputBuffer &buf, const lld::AtomLayout &atom,
|
|
const Reference &ref) const {
|
|
if (ref.kindNamespace() != lld::Reference::KindNamespace::ELF)
|
|
return std::error_code();
|
|
assert(ref.kindArch() == Reference::KindArch::Mips);
|
|
|
|
uint64_t gpAddr = _targetLayout.getGPAddr();
|
|
|
|
AtomLayout *gpDispAtom = _targetLayout.getGPDisp();
|
|
bool isGpDisp = gpDispAtom && ref.target() == gpDispAtom->_atom;
|
|
|
|
uint8_t *atomContent = buf.getBufferStart() + atom._fileOffset;
|
|
uint8_t *location = atomContent + ref.offsetInAtom();
|
|
uint64_t tgtAddr = writer.addressOfAtom(ref.target());
|
|
uint64_t relAddr = atom._virtualAddr + ref.offsetInAtom();
|
|
|
|
if (isMicroMipsAtom(ref.target()))
|
|
tgtAddr |= 1;
|
|
|
|
CrossJumpMode jumpMode = getCrossJumpMode(ref);
|
|
|
|
ErrorOr<uint64_t> res =
|
|
calculateRelocation(ref.kindValue(), ref.addend(), tgtAddr, relAddr,
|
|
gpAddr, isGpDisp, jumpMode);
|
|
if (auto ec = res.getError())
|
|
return ec;
|
|
|
|
// If output relocation format is REL and the input one is RELA, the only
|
|
// method to transfer the relocation addend from the input relocation
|
|
// to the output dynamic relocation is to save this addend to the location
|
|
// modified by R_MIPS_REL32.
|
|
if (ref.kindValue() == R_MIPS_REL32 && !_ctx.isRelaOutputFormat())
|
|
res = ref.addend();
|
|
|
|
Reference::KindValue op = ref.kindValue();
|
|
|
|
// FIXME (simon): Handle r_ssym value.
|
|
for (auto tag = (ref.tag() & 0xffff); tag & 0xff; tag >>= 8) {
|
|
op = tag & 0xff;
|
|
res = calculateRelocation(op, *res, 0, relAddr, gpAddr, isGpDisp, jumpMode);
|
|
if (auto ec = res.getError())
|
|
return ec;
|
|
}
|
|
|
|
auto params = getRelocationParams(op);
|
|
uint64_t ins = relocRead(params, location);
|
|
|
|
if (auto ec = adjustJumpOpCode(ins, tgtAddr, jumpMode))
|
|
return ec;
|
|
|
|
ins = (ins & ~params._mask) | (*res & params._mask);
|
|
relocWrite<ELFT>(ins, params, location);
|
|
|
|
return std::error_code();
|
|
}
|
|
|
|
namespace lld {
|
|
namespace elf {
|
|
|
|
template <>
|
|
std::unique_ptr<TargetRelocationHandler>
|
|
createMipsRelocationHandler<ELF32LE>(MipsLinkingContext &ctx,
|
|
MipsTargetLayout<ELF32LE> &layout) {
|
|
return llvm::make_unique<RelocationHandler<ELF32LE>>(ctx, layout);
|
|
}
|
|
|
|
template <>
|
|
std::unique_ptr<TargetRelocationHandler>
|
|
createMipsRelocationHandler<ELF64LE>(MipsLinkingContext &ctx,
|
|
MipsTargetLayout<ELF64LE> &layout) {
|
|
return llvm::make_unique<RelocationHandler<ELF64LE>>(ctx, layout);
|
|
}
|
|
|
|
Reference::Addend readMipsRelocAddend(Reference::KindValue kind,
|
|
const uint8_t *content) {
|
|
auto params = getRelocationParams(kind);
|
|
uint64_t ins = relocRead(params, content);
|
|
return (ins & params._mask) << params._shift;
|
|
}
|
|
|
|
} // elf
|
|
} // lld
|