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clang-p2996/lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
Greg Clayton a97c4d2154 Handle thumb IT instructions correctly all the time. 
The issue with Thumb IT (if/then) instructions is the IT instruction preceeds up to four instructions that are made conditional. If a breakpoint is placed on one of the conditional instructions, the instruction either needs to match the thumb opcode size (2 or 4 bytes) or a BKPT instruction needs to be used as these are always unconditional (even in a IT instruction). If BKPT instructions are used, then we might end up stopping on an instruction that won't get executed. So if we do stop at a BKPT instruction, we need to continue if the condition is not true.

When using the BKPT isntructions are easy in that you don't need to detect the size of the breakpoint that needs to be used when setting a breakpoint even in a thumb IT instruction. The bad part is you will now always stop at the opcode location and let LLDB determine if it should auto-continue. If the BKPT instruction is used, the BKPT that is used for ARM code should be something that also triggers the BKPT instruction in Thumb in case you set a breakpoint in the middle of code and the code is actually Thumb code. A value of 0xE120BE70 will work since the lower 16 bits being 0xBE70 happens to be a Thumb BKPT instruction. 

The alternative is to use trap or illegal instructions that the kernel will translate into breakpoint hits. On Mac this was 0xE7FFDEFE for ARM and 0xDEFE for Thumb. The darwin kernel currently doesn't recognize any 32 bit Thumb instruction as a instruction that will get turned into a breakpoint exception (EXC_BREAKPOINT), so we had to use the BKPT instruction on Mac. The linux kernel recognizes a 16 and a 32 bit instruction as valid thumb breakpoint opcodes. The benefit of using 16 or 32 bit instructions is you don't stop on opcodes in a IT block when the condition doesn't match. 

To further complicate things, single stepping on ARM is often implemented by modifying the BCR/BVR registers and setting the processor to stop when the PC is not equal to the current value. This means single stepping is another way the ARM target can stop on instructions that won't get executed.

This patch does the following:
1 - Fix the internal debugserver for Apple to use the BKPT instruction for ARM and Thumb
2 - Fix LLDB to catch when we stop in the middle of a Thumb IT instruction and continue if we stop at an instruction that won't execute
3 - Fixes this in a way that will work for any target on any platform as long as it is ARM/Thumb
4 - Adds a patch for ignoring conditions that don't match when in ARM mode (see below)

This patch also provides the code that implements the same thing for ARM instructions, though it is disabled for now. The ARM patch will check the condition of the instruction in ARM mode and continue if the condition isn't true (and therefore the instruction would not be executed). Again, this is not enable, but the code for it has been added.

<rdar://problem/19145455> 

llvm-svn: 223851
2014-12-09 23:31:02 +00:00

527 lines
20 KiB
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//===-- StopInfoMachException.cpp -------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#include "StopInfoMachException.h"
// C Includes
// C++ Includes
// Other libraries and framework includes
// Project includes
#include "lldb/Breakpoint/Watchpoint.h"
#include "lldb/Core/ArchSpec.h"
#include "lldb/Core/StreamString.h"
#include "lldb/Symbol/Symbol.h"
#include "lldb/Target/DynamicLoader.h"
#include "lldb/Target/ExecutionContext.h"
#include "lldb/Target/Process.h"
#include "lldb/Target/RegisterContext.h"
#include "lldb/Target/Target.h"
#include "lldb/Target/Thread.h"
#include "lldb/Target/ThreadPlan.h"
#include "lldb/Target/UnixSignals.h"
using namespace lldb;
using namespace lldb_private;
const char *
StopInfoMachException::GetDescription ()
{
if (m_description.empty() && m_value != 0)
{
ExecutionContext exe_ctx (m_thread_wp.lock());
Target *target = exe_ctx.GetTargetPtr();
const llvm::Triple::ArchType cpu = target ? target->GetArchitecture().GetMachine() : llvm::Triple::UnknownArch;
const char *exc_desc = NULL;
const char *code_label = "code";
const char *code_desc = NULL;
const char *subcode_label = "subcode";
const char *subcode_desc = NULL;
switch (m_value)
{
case 1: // EXC_BAD_ACCESS
exc_desc = "EXC_BAD_ACCESS";
subcode_label = "address";
switch (cpu)
{
case llvm::Triple::x86:
case llvm::Triple::x86_64:
switch (m_exc_code)
{
case 0xd: code_desc = "EXC_I386_GPFLT"; m_exc_data_count = 1; break;
}
break;
case llvm::Triple::arm:
switch (m_exc_code)
{
case 0x101: code_desc = "EXC_ARM_DA_ALIGN"; break;
case 0x102: code_desc = "EXC_ARM_DA_DEBUG"; break;
}
break;
case llvm::Triple::ppc:
case llvm::Triple::ppc64:
switch (m_exc_code)
{
case 0x101: code_desc = "EXC_PPC_VM_PROT_READ"; break;
case 0x102: code_desc = "EXC_PPC_BADSPACE"; break;
case 0x103: code_desc = "EXC_PPC_UNALIGNED"; break;
}
break;
default:
break;
}
break;
case 2: // EXC_BAD_INSTRUCTION
exc_desc = "EXC_BAD_INSTRUCTION";
switch (cpu)
{
case llvm::Triple::x86:
case llvm::Triple::x86_64:
if (m_exc_code == 1)
code_desc = "EXC_I386_INVOP";
break;
case llvm::Triple::ppc:
case llvm::Triple::ppc64:
switch (m_exc_code)
{
case 1: code_desc = "EXC_PPC_INVALID_SYSCALL"; break;
case 2: code_desc = "EXC_PPC_UNIPL_INST"; break;
case 3: code_desc = "EXC_PPC_PRIVINST"; break;
case 4: code_desc = "EXC_PPC_PRIVREG"; break;
case 5: code_desc = "EXC_PPC_TRACE"; break;
case 6: code_desc = "EXC_PPC_PERFMON"; break;
}
break;
case llvm::Triple::arm:
if (m_exc_code == 1)
code_desc = "EXC_ARM_UNDEFINED";
break;
default:
break;
}
break;
case 3: // EXC_ARITHMETIC
exc_desc = "EXC_ARITHMETIC";
switch (cpu)
{
case llvm::Triple::x86:
case llvm::Triple::x86_64:
switch (m_exc_code)
{
case 1: code_desc = "EXC_I386_DIV"; break;
case 2: code_desc = "EXC_I386_INTO"; break;
case 3: code_desc = "EXC_I386_NOEXT"; break;
case 4: code_desc = "EXC_I386_EXTOVR"; break;
case 5: code_desc = "EXC_I386_EXTERR"; break;
case 6: code_desc = "EXC_I386_EMERR"; break;
case 7: code_desc = "EXC_I386_BOUND"; break;
case 8: code_desc = "EXC_I386_SSEEXTERR"; break;
}
break;
case llvm::Triple::ppc:
case llvm::Triple::ppc64:
switch (m_exc_code)
{
case 1: code_desc = "EXC_PPC_OVERFLOW"; break;
case 2: code_desc = "EXC_PPC_ZERO_DIVIDE"; break;
case 3: code_desc = "EXC_PPC_FLT_INEXACT"; break;
case 4: code_desc = "EXC_PPC_FLT_ZERO_DIVIDE"; break;
case 5: code_desc = "EXC_PPC_FLT_UNDERFLOW"; break;
case 6: code_desc = "EXC_PPC_FLT_OVERFLOW"; break;
case 7: code_desc = "EXC_PPC_FLT_NOT_A_NUMBER"; break;
}
break;
default:
break;
}
break;
case 4: // EXC_EMULATION
exc_desc = "EXC_EMULATION";
break;
case 5: // EXC_SOFTWARE
exc_desc = "EXC_SOFTWARE";
if (m_exc_code == 0x10003)
{
subcode_desc = "EXC_SOFT_SIGNAL";
subcode_label = "signo";
}
break;
case 6: // EXC_BREAKPOINT
{
exc_desc = "EXC_BREAKPOINT";
switch (cpu)
{
case llvm::Triple::x86:
case llvm::Triple::x86_64:
switch (m_exc_code)
{
case 1: code_desc = "EXC_I386_SGL"; break;
case 2: code_desc = "EXC_I386_BPT"; break;
}
break;
case llvm::Triple::ppc:
case llvm::Triple::ppc64:
switch (m_exc_code)
{
case 1: code_desc = "EXC_PPC_BREAKPOINT"; break;
}
break;
case llvm::Triple::arm:
switch (m_exc_code)
{
case 0x101: code_desc = "EXC_ARM_DA_ALIGN"; break;
case 0x102: code_desc = "EXC_ARM_DA_DEBUG"; break;
case 1: code_desc = "EXC_ARM_BREAKPOINT"; break;
// FIXME temporary workaround, exc_code 0 does not really mean EXC_ARM_BREAKPOINT
case 0: code_desc = "EXC_ARM_BREAKPOINT"; break;
}
break;
default:
break;
}
}
break;
case 7:
exc_desc = "EXC_SYSCALL";
break;
case 8:
exc_desc = "EXC_MACH_SYSCALL";
break;
case 9:
exc_desc = "EXC_RPC_ALERT";
break;
case 10:
exc_desc = "EXC_CRASH";
break;
case 11:
exc_desc = "EXC_RESOURCE";
break;
case 12:
exc_desc = "EXC_GUARD";
break;
}
StreamString strm;
if (exc_desc)
strm.PutCString(exc_desc);
else
strm.Printf("EXC_??? (%" PRIu64 ")", m_value);
if (m_exc_data_count >= 1)
{
if (code_desc)
strm.Printf(" (%s=%s", code_label, code_desc);
else
strm.Printf(" (%s=%" PRIu64, code_label, m_exc_code);
}
if (m_exc_data_count >= 2)
{
if (subcode_desc)
strm.Printf(", %s=%s", subcode_label, subcode_desc);
else
strm.Printf(", %s=0x%" PRIx64, subcode_label, m_exc_subcode);
}
if (m_exc_data_count > 0)
strm.PutChar(')');
m_description.swap (strm.GetString());
}
return m_description.c_str();
}
StopInfoSP
StopInfoMachException::CreateStopReasonWithMachException
(
Thread &thread,
uint32_t exc_type,
uint32_t exc_data_count,
uint64_t exc_code,
uint64_t exc_sub_code,
uint64_t exc_sub_sub_code,
bool pc_already_adjusted,
bool adjust_pc_if_needed
)
{
if (exc_type != 0)
{
uint32_t pc_decrement = 0;
ExecutionContext exe_ctx (thread.shared_from_this());
Target *target = exe_ctx.GetTargetPtr();
const llvm::Triple::ArchType cpu = target ? target->GetArchitecture().GetMachine() : llvm::Triple::UnknownArch;
switch (exc_type)
{
case 1: // EXC_BAD_ACCESS
break;
case 2: // EXC_BAD_INSTRUCTION
switch (cpu)
{
case llvm::Triple::ppc:
case llvm::Triple::ppc64:
switch (exc_code)
{
case 1: // EXC_PPC_INVALID_SYSCALL
case 2: // EXC_PPC_UNIPL_INST
case 3: // EXC_PPC_PRIVINST
case 4: // EXC_PPC_PRIVREG
break;
case 5: // EXC_PPC_TRACE
return StopInfo::CreateStopReasonToTrace (thread);
case 6: // EXC_PPC_PERFMON
break;
}
break;
default:
break;
}
break;
case 3: // EXC_ARITHMETIC
case 4: // EXC_EMULATION
break;
case 5: // EXC_SOFTWARE
if (exc_code == 0x10003) // EXC_SOFT_SIGNAL
{
if (exc_sub_code == 5)
{
// On MacOSX, a SIGTRAP can signify that a process has called
// exec, so we should check with our dynamic loader to verify.
ProcessSP process_sp (thread.GetProcess());
if (process_sp)
{
DynamicLoader *dynamic_loader = process_sp->GetDynamicLoader();
if (dynamic_loader && dynamic_loader->ProcessDidExec())
{
// The program was re-exec'ed
return StopInfo::CreateStopReasonWithExec (thread);
}
// if (!process_did_exec)
// {
// // We have a SIGTRAP, make sure we didn't exec by checking
// // for the PC being at "_dyld_start"...
// lldb::StackFrameSP frame_sp (thread.GetStackFrameAtIndex(0));
// if (frame_sp)
// {
// const Symbol *symbol = frame_sp->GetSymbolContext(eSymbolContextSymbol).symbol;
// if (symbol)
// {
// if (symbol->GetName() == ConstString("_dyld_start"))
// process_did_exec = true;
// }
// }
// }
}
}
return StopInfo::CreateStopReasonWithSignal (thread, exc_sub_code);
}
break;
case 6: // EXC_BREAKPOINT
{
bool is_actual_breakpoint = false;
bool is_trace_if_actual_breakpoint_missing = false;
switch (cpu)
{
case llvm::Triple::x86:
case llvm::Triple::x86_64:
if (exc_code == 1) // EXC_I386_SGL
{
if (!exc_sub_code)
{
// This looks like a plain trap.
// Have to check if there is a breakpoint here as well. When you single-step onto a trap,
// the single step stops you not to trap. Since we also do that check below, let's just use
// that logic.
is_actual_breakpoint = true;
is_trace_if_actual_breakpoint_missing = true;
}
else
{
// It's a watchpoint, then.
// The exc_sub_code indicates the data break address.
lldb::WatchpointSP wp_sp;
if (target)
wp_sp = target->GetWatchpointList().FindByAddress((lldb::addr_t)exc_sub_code);
if (wp_sp && wp_sp->IsEnabled())
{
// Debugserver may piggyback the hardware index of the fired watchpoint in the exception data.
// Set the hardware index if that's the case.
if (exc_data_count >=3)
wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
return StopInfo::CreateStopReasonWithWatchpointID(thread, wp_sp->GetID());
}
}
}
else if (exc_code == 2 || // EXC_I386_BPT
exc_code == 3) // EXC_I386_BPTFLT
{
// KDP returns EXC_I386_BPTFLT for trace breakpoints
if (exc_code == 3)
is_trace_if_actual_breakpoint_missing = true;
is_actual_breakpoint = true;
if (!pc_already_adjusted)
pc_decrement = 1;
}
break;
case llvm::Triple::ppc:
case llvm::Triple::ppc64:
is_actual_breakpoint = exc_code == 1; // EXC_PPC_BREAKPOINT
break;
case llvm::Triple::arm:
if (exc_code == 0x102) // EXC_ARM_DA_DEBUG
{
// It's a watchpoint, then, if the exc_sub_code indicates a known/enabled
// data break address from our watchpoint list.
lldb::WatchpointSP wp_sp;
if (target)
wp_sp = target->GetWatchpointList().FindByAddress((lldb::addr_t)exc_sub_code);
if (wp_sp && wp_sp->IsEnabled())
{
// Debugserver may piggyback the hardware index of the fired watchpoint in the exception data.
// Set the hardware index if that's the case.
if (exc_data_count >=3)
wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
return StopInfo::CreateStopReasonWithWatchpointID(thread, wp_sp->GetID());
}
else
{
is_actual_breakpoint = true;
is_trace_if_actual_breakpoint_missing = true;
}
}
else if (exc_code == 1) // EXC_ARM_BREAKPOINT
{
is_actual_breakpoint = true;
is_trace_if_actual_breakpoint_missing = true;
}
else if (exc_code == 0) // FIXME not EXC_ARM_BREAKPOINT but a kernel is currently returning this so accept it as indicating a breakpoint until the kernel is fixed
{
is_actual_breakpoint = true;
is_trace_if_actual_breakpoint_missing = true;
}
break;
case llvm::Triple::aarch64:
{
if (exc_code == 1 && exc_sub_code == 0) // EXC_ARM_BREAKPOINT
{
// This is hit when we single instruction step aka MDSCR_EL1 SS bit 0 is set
return StopInfo::CreateStopReasonToTrace(thread);
}
if (exc_code == 0x102) // EXC_ARM_DA_DEBUG
{
// It's a watchpoint, then, if the exc_sub_code indicates a known/enabled
// data break address from our watchpoint list.
lldb::WatchpointSP wp_sp;
if (target)
wp_sp = target->GetWatchpointList().FindByAddress((lldb::addr_t)exc_sub_code);
if (wp_sp && wp_sp->IsEnabled())
{
// Debugserver may piggyback the hardware index of the fired watchpoint in the exception data.
// Set the hardware index if that's the case.
if (exc_data_count >= 3)
wp_sp->SetHardwareIndex((uint32_t)exc_sub_sub_code);
return StopInfo::CreateStopReasonWithWatchpointID(thread, wp_sp->GetID());
}
// EXC_ARM_DA_DEBUG seems to be reused for EXC_BREAKPOINT as well as EXC_BAD_ACCESS
if (thread.GetTemporaryResumeState() == eStateStepping)
return StopInfo::CreateStopReasonToTrace(thread);
}
// It looks like exc_sub_code has the 4 bytes of the instruction that triggered the
// exception, i.e. our breakpoint opcode
is_actual_breakpoint = exc_code == 1;
break;
}
default:
break;
}
if (is_actual_breakpoint)
{
RegisterContextSP reg_ctx_sp (thread.GetRegisterContext());
addr_t pc = reg_ctx_sp->GetPC() - pc_decrement;
ProcessSP process_sp (thread.CalculateProcess());
lldb::BreakpointSiteSP bp_site_sp;
if (process_sp)
bp_site_sp = process_sp->GetBreakpointSiteList().FindByAddress(pc);
if (bp_site_sp && bp_site_sp->IsEnabled())
{
// Update the PC if we were asked to do so, but only do
// so if we find a breakpoint that we know about cause
// this could be a trap instruction in the code
if (pc_decrement > 0 && adjust_pc_if_needed)
reg_ctx_sp->SetPC (pc);
// If the breakpoint is for this thread, then we'll report the hit, but if it is for another thread,
// we can just report no reason. We don't need to worry about stepping over the breakpoint here, that
// will be taken care of when the thread resumes and notices that there's a breakpoint under the pc.
if (bp_site_sp->ValidForThisThread (&thread))
return StopInfo::CreateStopReasonWithBreakpointSiteID (thread, bp_site_sp->GetID());
else
return StopInfoSP();
}
// Don't call this a trace if we weren't single stepping this thread.
if (is_trace_if_actual_breakpoint_missing && thread.GetTemporaryResumeState() == eStateStepping)
{
return StopInfo::CreateStopReasonToTrace (thread);
}
}
}
break;
case 7: // EXC_SYSCALL
case 8: // EXC_MACH_SYSCALL
case 9: // EXC_RPC_ALERT
case 10: // EXC_CRASH
break;
}
return StopInfoSP(new StopInfoMachException (thread, exc_type, exc_data_count, exc_code, exc_sub_code));
}
return StopInfoSP();
}
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