Roger Ferrer Ibanez e8d4e88bab [DAG] Promote ADDCARRY / SUBCARRY ...

Add missing case that was not implemented yet.

Differential Revision: https://reviews.llvm.org/D38942

llvm-svn: 320567

2017-12-13 10:45:21 +00:00

..

AArch64

[CodeGen] Print jump-table index operands as %jump-table.0 in both MIR and debug output

2017-12-13 10:30:59 +00:00

AMDGPU

[MachineOperand][MIR] Add isRenamable to MachineOperand.

2017-12-12 17:53:59 +00:00

ARC

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ARM

[DAG] Promote ADDCARRY / SUBCARRY

2017-12-13 10:45:21 +00:00

AVR

[AVR] Fix two CodeGen tests

2017-12-09 07:51:43 +00:00

BPF

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Generic

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

Hexagon

[Hexagon] Relax some checks in testcases, NFC

2017-12-12 21:44:04 +00:00

Inputs

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Lanai

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

Mips

[mips] Provide additional DSP bitconvert patterns

2017-12-13 10:13:35 +00:00

MIR

[MachineOperand][MIR] Add isRenamable to MachineOperand.

2017-12-12 17:53:59 +00:00

MSP430

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

Nios2

[Nios2] final infrastructure to provide compilation of a return from a function

2017-12-07 12:35:02 +00:00

NVPTX

[NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __nvvm_fns builtin in clang.

2017-12-06 17:50:05 +00:00

PowerPC

[MachineOperand][MIR] Add isRenamable to MachineOperand.

2017-12-12 17:53:59 +00:00

RISCV

[RISCV] Add custom CC_RISCV calling convention and improved call support

2017-12-11 12:49:02 +00:00

SPARC

Revert r318704 - [Sparc] efficient pattern for UINT_TO_FP conversion

2017-12-11 22:25:04 +00:00

SystemZ

[MachineOperand][MIR] Add isRenamable to MachineOperand.

2017-12-12 17:53:59 +00:00

Thumb

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

Thumb2

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

WebAssembly

[WebAssembly] Reapply r319186: "Support bitcasted function addresses with varargs."

2017-12-08 21:27:00 +00:00

WinEH

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X86

[CodeGen] Print constant pool index operands as %const.0 + 8 in both MIR and debug output

2017-12-13 10:30:45 +00:00

XCore

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