David Stuttard ebc5020564 [AMDGPU] Update entry point name for PAL metadata (#123581) ...

Old entry-point metadata being updated. Nothing is required
to account for deprecation as nothing uses the old style

2025-01-21 09:37:22 +00:00

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AArch64

[AArch64] Improve bcvtn2 and remove aarch64_neon_bfcvt intrinsics (#120363)

2025-01-21 09:16:04 +00:00

AMDGPU

[AMDGPU] Update entry point name for PAL metadata (#123581)

2025-01-21 09:37:22 +00:00

ARC

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ARM

[CodeGenPrepare] Replace undef use with poison [NFC] (#123111)

2025-01-16 08:17:55 +00:00

AVR

[AVR] Force relocations for non-encodable jumps (#121498)

2025-01-20 09:23:57 +08:00

BPF

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CSKY

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DirectX

[DirectX] Set the EnableRawAndStructuredBuffers shader flag (#122667)

2025-01-20 17:05:34 -07:00

Generic

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Hexagon

[Hexagon] Omit calls to specialized {float,fix} routines (#117423)

2025-01-15 14:21:48 -06:00

Inputs

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Lanai

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LoongArch

[LoongArch] Add generation support for preld instruction (#118436)

2025-01-20 16:11:09 +08:00

M68k

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Mips

[Mips] Handle declspec(dllimport) on mipsel-windows-* triples (#120912)

2025-01-21 16:18:02 +08:00

MIR

[AMDGPU] Fix printing hasInitWholeWave in mir (#123232)

2025-01-17 03:00:02 -08:00

MLRegAlloc

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MSP430

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NVPTX

[SDAG] Fix CSE for ADDRSPACECAST nodes (#122912)

2025-01-20 09:09:22 -08:00

PowerPC

[llvm] Mark scavenging spill-slots as *spilled* stack objects. (#122673)

2025-01-14 10:18:31 +02:00

RISCV

[SDAG] Add an ISD node to help lower vector.extract.last.active (#118810)

2025-01-20 12:57:05 +00:00

SPARC

[LegalizeIntegerTypes] Use forceExpandWideMUL in ExpandIntRes_XMULO. (#123432)

2025-01-18 08:37:03 -08:00

SPIRV

[SPIRV] add pre legalization instruction combine (#122839)

2025-01-17 14:46:14 -05:00

SystemZ

[SystemZ] Add support for new cpu architecture - arch15

2025-01-20 19:30:21 +01:00

Thumb

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Thumb2

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VE

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WebAssembly

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WinCFGuard

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WinEH

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X86

[X86][AMX] Fix handling of AMX-FP8 internal intrinsics (#123540)

2025-01-21 10:11:29 +08:00

XCore

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Xtensa

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