clang-p2996

Files

Matt Arsenault 48155f93dd CodeGen: Emit error if getRegisterByName fails (#145194 )

This avoids using report_fatal_error and standardizes the error
message in a subset of the error conditions.

2025-06-23 16:33:35 +09:00

32abi.ll

[RegAlloc] Sort CopyHint by IsCSR (#131046 )

2025-04-14 09:58:46 -04:00

64abi.ll

[RegAlloc] Sort CopyHint by IsCSR (#131046 )

2025-04-14 09:58:46 -04:00

64atomics.ll

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64bit.ll

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64cond.ll

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64spill.ll

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2006-01-22-BitConvertLegalize.ll

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2007-05-09-JumpTables.ll

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2007-07-05-LiveIntervalAssert.ll

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2008-10-10-InlineAsmMemoryOperand.ll

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2008-10-10-InlineAsmRegOperand.ll

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2009-08-28-PIC.ll

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2009-08-28-WeakLinkage.ll

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2011-01-11-Call.ll

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2011-01-11-CC.ll

[SPARC] Use addxccc to do multiword addition when we have VIS3

2025-04-16 08:36:47 +07:00

2011-01-11-FrameAddr.ll

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2011-01-19-DelaySlot.ll

[RegAlloc] Sort CopyHint by IsCSR (#131046 )

2025-04-14 09:58:46 -04:00

2011-01-21-ByValArgs.ll

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2011-01-22-SRet.ll

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2011-12-03-TailDuplication.ll

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2012-05-01-LowerArguments.ll

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2013-05-17-CallFrame.ll

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alloca-align.ll

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analyze-branch.ll

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atomicrmw-uinc-udec-wrap.ll

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atomics.ll

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basictest.ll

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bigreturn.ll

[RegAlloc] Sort CopyHint by IsCSR (#131046 )

2025-04-14 09:58:46 -04:00

bitcast.ll

[SPARC] Use native bitcast instructions when we have VIS3

2025-04-17 23:39:46 +07:00

blockaddr.ll

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branches-relax.ll

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branches-v9.ll

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cast-sret-func.ll

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codemodel.ll

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constpool.ll

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constructor.ll

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ctlz.ll

[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232 )

2025-06-20 05:12:51 +07:00

ctpop.ll

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cttz.ll

[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232 )

2025-06-20 05:12:51 +07:00

data-align.ll

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DbgValueOtherTargets.test

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disable-fsmuld-fmuls.ll

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empty-functions.ll

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exception.ll

Sparc: Improve SETHI and R_SPARC_DISP32 tests

2025-05-05 09:17:27 -07:00

float-constants.ll

[SPARC] Use op-then-halve instructions when we have VIS3

2025-05-23 22:44:05 +07:00

float-vis3.ll

[SPARC] Use op-then-halve instructions when we have VIS3

2025-05-23 22:44:05 +07:00

float.ll

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fmuladd-soft-float.ll

[RegAlloc] Sort CopyHint by IsCSR (#131046 )

2025-04-14 09:58:46 -04:00

fp16-promote.ll

[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880 )

2025-02-19 10:16:57 +01:00

fp128-select.ll

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fp128-split.ll

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fp128.ll

PeepholeOpt: Fix looking for def of current copy to coalesce (#125533 )

2025-02-05 23:29:02 +07:00

fshl.ll

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func-addr.ll

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getpcx-call.ll

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getpcx-rdpc.ll

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globals.ll

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hard-quad-float.ll

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imm.ll

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inline-asm-i-constraint-i1.ll

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inlineasm-bad.ll

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inlineasm-output-template.ll

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inlineasm-v9.ll

[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232 )

2025-06-20 05:12:51 +07:00

inlineasm.ll

[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232 )

2025-06-20 05:12:51 +07:00

leafproc.ll

[RegAlloc] Sort CopyHint by IsCSR (#131046 )

2025-04-14 09:58:46 -04:00

LeonCASAInstructionUT.ll

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LeonDetectRoundChangePassUT.ll

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LeonFixAllFDIVSQRTPassUT.ll

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LeonInsertNOPLoadPassUT.ll

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LeonItinerariesUT.ll

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LeonSMACUMACInstructionUT.ll

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lit.local.cfg

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mature-mc-support.ll

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missing-sret.ll

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missinglabel.ll

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mult-alt-generic-sparc.ll

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multiple-div.ll

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multiply-extension.ll

Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897 ) (#136475 )

2025-04-22 20:57:56 +07:00

naked-fn-with-frame-pointer.ll

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obj-relocs.ll

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overflow-intrinsic-optimizations.ll

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parts.ll

[RegAlloc] Sort CopyHint by IsCSR (#131046 )

2025-04-14 09:58:46 -04:00

pic.ll

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private.ll

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readcycle.ll

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reg64.ll

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rem.ll

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reserved-arg-regs.ll

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reserved-regs-named.ll

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reserved-regs-unavailable.ll

CodeGen: Emit error if getRegisterByName fails (#145194 )

2025-06-23 16:33:35 +09:00

reserved-regs.ll

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salvage-debug-isel.ll

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select-mask.ll

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sethiandn.ll

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setjmp.ll

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smulo-128-legalisation-lowering.ll

Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897 ) (#136475 )

2025-04-22 20:57:56 +07:00

soft-float.ll

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soft-mul-div.ll

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spill.ll

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spillsize.ll

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sret-secondary.ll

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stack-align.ll

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stack-protector.ll

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tailcall.ll

[RegAlloc] Sort CopyHint by IsCSR (#131046 )

2025-04-14 09:58:46 -04:00

thread-pointer.ll

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tls.ll

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tn0009.mir

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tn0010.mir

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tn0011.ll

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tn0012.mir

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tn0013.mir

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trap.ll

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umulo-128-legalisation-lowering.ll

Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897 ) (#136475 )

2025-04-22 20:57:56 +07:00

varargs-v8.ll

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varargs.ll

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vector-call.ll

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vector-extract-elt.ll

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zerostructcall.ll

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