cdf2eef613
Summary: When splitting a store of a scalable type, the new address is calculated in SplitVecOp_STORE using a vscale and an add instruction. Reviewers: sdesmalen, efriedma, david-arm Reviewed By: david-arm Subscribers: tschuett, hiraditya, psnobl, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D83041
54 lines
1.9 KiB
LLVM
54 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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define void @store_promote_4i8(<vscale x 4 x i8> %data, <vscale x 4 x i8>* %a) {
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; CHECK-LABEL: store_promote_4i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: st1b { z0.s }, p0, [x0]
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; CHECK-NEXT: ret
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store <vscale x 4 x i8> %data, <vscale x 4 x i8>* %a
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ret void
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}
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define void @store_split_i16(<vscale x 16 x i16> %data, <vscale x 16 x i16>* %a) {
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; CHECK-LABEL: store_split_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.h
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; CHECK-NEXT: st1h { z1.h }, p0, [x0, #1, mul vl]
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; CHECK-NEXT: st1h { z0.h }, p0, [x0]
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; CHECK-NEXT: ret
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store <vscale x 16 x i16> %data, <vscale x 16 x i16>* %a
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ret void
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}
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define void @store_split_16i32(<vscale x 16 x i32> %data, <vscale x 16 x i32>* %a) {
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; CHECK-LABEL: store_split_16i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: st1w { z3.s }, p0, [x0, #3, mul vl]
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; CHECK-NEXT: st1w { z2.s }, p0, [x0, #2, mul vl]
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; CHECK-NEXT: st1w { z1.s }, p0, [x0, #1, mul vl]
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; CHECK-NEXT: st1w { z0.s }, p0, [x0]
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; CHECK-NEXT: ret
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store <vscale x 16 x i32> %data, <vscale x 16 x i32>* %a
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ret void
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}
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define void @store_split_16i64(<vscale x 16 x i64> %data, <vscale x 16 x i64>* %a) {
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; CHECK-LABEL: store_split_16i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: st1d { z7.d }, p0, [x0, #7, mul vl]
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; CHECK-NEXT: st1d { z6.d }, p0, [x0, #6, mul vl]
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; CHECK-NEXT: st1d { z5.d }, p0, [x0, #5, mul vl]
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; CHECK-NEXT: st1d { z4.d }, p0, [x0, #4, mul vl]
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; CHECK-NEXT: st1d { z3.d }, p0, [x0, #3, mul vl]
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; CHECK-NEXT: st1d { z2.d }, p0, [x0, #2, mul vl]
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; CHECK-NEXT: st1d { z1.d }, p0, [x0, #1, mul vl]
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; CHECK-NEXT: st1d { z0.d }, p0, [x0]
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; CHECK-NEXT: ret
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store <vscale x 16 x i64> %data, <vscale x 16 x i64>* %a
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ret void
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}
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