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clang-p2996/llvm/test/CodeGen/ARM/codesize-ifcvt.mir
Sjoerd Meijer 7efabe5c7d [MIR][ARM] MachineOperand comments 
This adds infrastructure to print and parse MIR MachineOperand comments.
The motivation for the ARM backend is to print condition code names instead of
magic constants that are difficult to read (for human beings). For example,
instead of this:

  dead renamable $r2, $cpsr = tEOR killed renamable $r2, renamable $r1, 14, $noreg
  t2Bcc %bb.4, 0, killed $cpsr

we now print this:

  dead renamable $r2, $cpsr = tEOR killed renamable $r2, renamable $r1, 14 /* CC::always */, $noreg
  t2Bcc %bb.4, 0 /* CC:eq */, killed $cpsr

This shows that MachineOperand comments are enclosed between /* and */. In this
example, the EOR instruction is not conditionally executed (i.e. it is "always
executed"), which is encoded by the 14 immediate machine operand. Thus, now
this machine operand has /* CC::always */ as a comment. The 0 on the next
conditional branch instruction represents the equal condition code, thus now
this operand has /* CC:eq */ as a comment.

As it is a comment, the MI lexer/parser completely ignores it. The benefit is
that this keeps the change in the lexer extremely minimal and no target
specific parsing needs to be done. The changes on the MIPrinter side are also
minimal, as there is only one target hooks that is used to create the machine
operand comments.

Differential Revision: https://reviews.llvm.org/D74306
2020-02-24 14:19:21 +00:00

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=thumbv7 -run-pass=if-converter %s -o - | FileCheck %s
--- |
define void @test_nosize() {
%c0 = icmp sgt i64 0, 0
br i1 %c0, label %b1, label %b6
b1: ; preds = %0
br i1 undef, label %b3, label %b2
b2: ; preds = %b1
%v0 = tail call i32 @extfunc()
br label %b5
b3: ; preds = %b1
%v1 = load i32, i32* undef, align 4
%v2 = and i32 %v1, 256
br label %b5
b5: ; preds = %b3, %b2
%v3 = phi i32 [ %v2, %b3 ], [ %v0, %b2 ]
%c1 = icmp eq i32 %v3, 0
br i1 %c1, label %b8, label %b7
b6: ; preds = %0
%1 = tail call i32 @extfunc()
ret void
b7: ; preds = %b5
%2 = tail call i32 @extfunc()
ret void
b8: ; preds = %b5
ret void
}
; Function Attrs: optsize
define void @test_optsize() #0 {
%c0 = icmp sgt i64 0, 0
br i1 %c0, label %b1, label %b6
b1: ; preds = %0
br i1 undef, label %b3, label %b2
b2: ; preds = %b1
%v0 = tail call i32 @extfunc()
br label %b5
b3: ; preds = %b1
%v1 = load i32, i32* undef, align 4
%v2 = and i32 %v1, 256
br label %b5
b5: ; preds = %b3, %b2
%v3 = phi i32 [ %v2, %b3 ], [ %v0, %b2 ]
%c1 = icmp eq i32 %v3, 0
br i1 %c1, label %b8, label %b7
b6: ; preds = %0
%1 = tail call i32 @extfunc()
ret void
b7: ; preds = %b5
%2 = tail call i32 @extfunc()
ret void
b8: ; preds = %b5
ret void
}
; Function Attrs: minsize
define void @test_minsize() #1 {
%c0 = icmp sgt i64 0, 0
br i1 %c0, label %b1, label %b6
b1: ; preds = %0
br i1 undef, label %b3, label %b2
b2: ; preds = %b1
%v0 = tail call i32 @extfunc()
br label %b5
b3: ; preds = %b1
%v1 = load i32, i32* undef, align 4
%v2 = and i32 %v1, 256
br label %b5
b5: ; preds = %b3, %b2
%v3 = phi i32 [ %v2, %b3 ], [ %v0, %b2 ]
%c1 = icmp eq i32 %v3, 0
br i1 %c1, label %b8, label %b7
b6: ; preds = %0
%1 = tail call i32 @extfunc()
ret void
b7: ; preds = %b5
%2 = tail call i32 @extfunc()
ret void
b8: ; preds = %b5
ret void
}
declare i32 @extfunc()
; Function Attrs: nounwind
declare void @llvm.stackprotector(i8*, i8**) #2
attributes #0 = { optsize }
attributes #1 = { minsize }
attributes #2 = { nounwind }
...
---
name: test_nosize
alignment: 2
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
hasWinCFI: false
registers: []
liveins: []
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 8
offsetAdjustment: 0
maxAlignment: 4
adjustsStack: true
hasCalls: true
stackProtector: ''
maxCallFrameSize: 0
cvBytesOfCalleeSavedRegisters: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack: []
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
callSites: []
constants: []
machineFunctionInfo: {}
body: |
; CHECK-LABEL: name: test_nosize
; CHECK: bb.0 (%ir-block.0):
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK: liveins: $lr, $r7
; CHECK: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: tTAILJMPdND @extfunc, 1 /* CC::ne */, killed $cpsr, implicit $sp, implicit $sp
; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8
; CHECK: renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2Bcc %bb.2, 1 /* CC::ne */, killed $cpsr
; CHECK: bb.1.b2:
; CHECK: successors: %bb.3(0x80000000)
; CHECK: tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
; CHECK: t2B %bb.3, 14 /* CC::al */, $noreg
; CHECK: bb.2.b3:
; CHECK: successors: %bb.3(0x80000000)
; CHECK: renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
; CHECK: renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
; CHECK: bb.3.b5:
; CHECK: liveins: $r0
; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
; CHECK: tBX_RET 0 /* CC::eq */, killed $cpsr
; CHECK: tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
bb.0 (%ir-block.0):
successors: %bb.1(0x50000000), %bb.6(0x30000000)
liveins: $lr, $r7
renamable $r0 = t2MOVi 1, 14, $noreg, $noreg
t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr
t2Bcc %bb.6, 1, killed $cpsr
bb.1.b1:
successors: %bb.3(0x40000000), %bb.2(0x40000000)
liveins: $r7, $lr
$sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr
frame-setup CFI_INSTRUCTION def_cfa_offset 8
frame-setup CFI_INSTRUCTION offset $lr, -4
frame-setup CFI_INSTRUCTION offset $r7, -8
renamable $r0 = t2MOVi 0, 14, $noreg, $noreg
t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr
t2Bcc %bb.3, 1, killed $cpsr
bb.2.b2:
successors: %bb.4(0x80000000)
tBL 14, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
t2B %bb.4, 14, $noreg
bb.3.b3:
successors: %bb.4(0x80000000)
renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14, $noreg :: (load 4 from `i32* undef`)
renamable $r0 = t2ANDri killed renamable $r0, 256, 14, $noreg, $noreg
bb.4.b5:
successors: %bb.5(0x30000000), %bb.6(0x50000000)
liveins: $r0
t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr
$sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr
t2Bcc %bb.6, 1, killed $cpsr
bb.5.b8:
liveins: $lr, $r7
tBX_RET 14, $noreg
bb.6.b7:
liveins: $lr, $r7
tTAILJMPdND @extfunc, 14, $noreg, implicit $sp, implicit $sp
...
---
name: test_optsize
alignment: 2
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
hasWinCFI: false
registers: []
liveins: []
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 8
offsetAdjustment: 0
maxAlignment: 4
adjustsStack: true
hasCalls: true
stackProtector: ''
maxCallFrameSize: 0
cvBytesOfCalleeSavedRegisters: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack: []
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
callSites: []
constants: []
machineFunctionInfo: {}
body: |
; CHECK-LABEL: name: test_optsize
; CHECK: bb.0 (%ir-block.0):
; CHECK: successors: %bb.1(0x50000000), %bb.6(0x30000000)
; CHECK: liveins: $lr, $r7
; CHECK: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
; CHECK: bb.1.b1:
; CHECK: successors: %bb.3(0x40000000), %bb.2(0x40000000)
; CHECK: liveins: $r7, $lr
; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8
; CHECK: renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
; CHECK: bb.2.b2:
; CHECK: successors: %bb.4(0x80000000)
; CHECK: tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
; CHECK: t2B %bb.4, 14 /* CC::al */, $noreg
; CHECK: bb.3.b3:
; CHECK: successors: %bb.4(0x80000000)
; CHECK: renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
; CHECK: renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
; CHECK: bb.4.b5:
; CHECK: successors: %bb.5(0x30000000), %bb.6(0x50000000)
; CHECK: liveins: $r0
; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
; CHECK: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
; CHECK: bb.5.b8:
; CHECK: liveins: $lr, $r7
; CHECK: tBX_RET 14 /* CC::al */, $noreg
; CHECK: bb.6.b7:
; CHECK: liveins: $lr, $r7
; CHECK: tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
bb.0 (%ir-block.0):
successors: %bb.1(0x50000000), %bb.6(0x30000000)
liveins: $lr, $r7
renamable $r0 = t2MOVi 1, 14, $noreg, $noreg
t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr
t2Bcc %bb.6, 1, killed $cpsr
bb.1.b1:
successors: %bb.3(0x40000000), %bb.2(0x40000000)
liveins: $r7, $lr
$sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr
frame-setup CFI_INSTRUCTION def_cfa_offset 8
frame-setup CFI_INSTRUCTION offset $lr, -4
frame-setup CFI_INSTRUCTION offset $r7, -8
renamable $r0 = t2MOVi 0, 14, $noreg, $noreg
t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr
t2Bcc %bb.3, 1, killed $cpsr
bb.2.b2:
successors: %bb.4(0x80000000)
tBL 14, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
t2B %bb.4, 14, $noreg
bb.3.b3:
successors: %bb.4(0x80000000)
renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14, $noreg :: (load 4 from `i32* undef`)
renamable $r0 = t2ANDri killed renamable $r0, 256, 14, $noreg, $noreg
bb.4.b5:
successors: %bb.5(0x30000000), %bb.6(0x50000000)
liveins: $r0
t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr
$sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr
t2Bcc %bb.6, 1, killed $cpsr
bb.5.b8:
liveins: $lr, $r7
tBX_RET 14, $noreg
bb.6.b7:
liveins: $lr, $r7
tTAILJMPdND @extfunc, 14, $noreg, implicit $sp, implicit $sp
...
---
name: test_minsize
alignment: 2
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
hasWinCFI: false
registers: []
liveins: []
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 8
offsetAdjustment: 0
maxAlignment: 4
adjustsStack: true
hasCalls: true
stackProtector: ''
maxCallFrameSize: 0
cvBytesOfCalleeSavedRegisters: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack: []
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
callSites: []
constants: []
machineFunctionInfo: {}
body: |
; CHECK-LABEL: name: test_minsize
; CHECK: bb.0 (%ir-block.0):
; CHECK: successors: %bb.1(0x50000000), %bb.6(0x30000000)
; CHECK: liveins: $lr, $r7
; CHECK: renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
; CHECK: bb.1.b1:
; CHECK: successors: %bb.3(0x40000000), %bb.2(0x40000000)
; CHECK: liveins: $r7, $lr
; CHECK: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 8
; CHECK: frame-setup CFI_INSTRUCTION offset $lr, -4
; CHECK: frame-setup CFI_INSTRUCTION offset $r7, -8
; CHECK: renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
; CHECK: bb.2.b2:
; CHECK: successors: %bb.4(0x80000000)
; CHECK: tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
; CHECK: t2B %bb.4, 14 /* CC::al */, $noreg
; CHECK: bb.3.b3:
; CHECK: successors: %bb.4(0x80000000)
; CHECK: renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
; CHECK: renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
; CHECK: bb.4.b5:
; CHECK: successors: %bb.5(0x30000000), %bb.6(0x50000000)
; CHECK: liveins: $r0
; CHECK: t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
; CHECK: t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
; CHECK: bb.5.b8:
; CHECK: liveins: $lr, $r7
; CHECK: tBX_RET 14 /* CC::al */, $noreg
; CHECK: bb.6.b7:
; CHECK: liveins: $lr, $r7
; CHECK: tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
bb.0 (%ir-block.0):
successors: %bb.1(0x50000000), %bb.6(0x30000000)
liveins: $lr, $r7
renamable $r0 = t2MOVi 1, 14, $noreg, $noreg
t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr
t2Bcc %bb.6, 1, killed $cpsr
bb.1.b1:
successors: %bb.3(0x40000000), %bb.2(0x40000000)
liveins: $r7, $lr
$sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r7, killed $lr
frame-setup CFI_INSTRUCTION def_cfa_offset 8
frame-setup CFI_INSTRUCTION offset $lr, -4
frame-setup CFI_INSTRUCTION offset $r7, -8
renamable $r0 = t2MOVi 0, 14, $noreg, $noreg
t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr
t2Bcc %bb.3, 1, killed $cpsr
bb.2.b2:
successors: %bb.4(0x80000000)
tBL 14, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
t2B %bb.4, 14, $noreg
bb.3.b3:
successors: %bb.4(0x80000000)
renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14, $noreg :: (load 4 from `i32* undef`)
renamable $r0 = t2ANDri killed renamable $r0, 256, 14, $noreg, $noreg
bb.4.b5:
successors: %bb.5(0x30000000), %bb.6(0x50000000)
liveins: $r0
t2CMPri killed renamable $r0, 0, 14, $noreg, implicit-def $cpsr
$sp = t2LDMIA_UPD $sp, 14, $noreg, def $r7, def $lr
t2Bcc %bb.6, 1, killed $cpsr
bb.5.b8:
liveins: $lr, $r7
tBX_RET 14, $noreg
bb.6.b7:
liveins: $lr, $r7
tTAILJMPdND @extfunc, 14, $noreg, implicit $sp, implicit $sp
...
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