4f04db4b54
Along the lines of D77454 and D79968. Unlike loads and stores, the default alignment is getPrefTypeAlign, to match the existing handling in various places, including SelectionDAG and InstCombine. Differential Revision: https://reviews.llvm.org/D80044
40 lines
1.5 KiB
LLVM
40 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes
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; RUN: opt %s -argpromotion -S -o - | FileCheck %s
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; RUN: opt %s -passes=argpromotion -S -o - | FileCheck %s
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; PR14710
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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%pair = type { i32, i32 }
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declare i8* @foo(%pair*)
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define internal void @bar(%pair* byval %Data) {
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; CHECK-LABEL: define {{[^@]+}}@bar
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; CHECK-SAME: (i32 [[DATA_0:%.*]], i32 [[DATA_1:%.*]])
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; CHECK-NEXT: [[DATA:%.*]] = alloca [[PAIR:%.*]], align 8
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; CHECK-NEXT: [[DOT0:%.*]] = getelementptr [[PAIR]], %pair* [[DATA]], i32 0, i32 0
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; CHECK-NEXT: store i32 [[DATA_0]], i32* [[DOT0]], align 4
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; CHECK-NEXT: [[DOT1:%.*]] = getelementptr [[PAIR]], %pair* [[DATA]], i32 0, i32 1
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; CHECK-NEXT: store i32 [[DATA_1]], i32* [[DOT1]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = call i8* @foo(%pair* [[DATA]])
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; CHECK-NEXT: ret void
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;
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tail call i8* @foo(%pair* %Data)
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ret void
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}
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define void @zed(%pair* byval %Data) {
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; CHECK-LABEL: define {{[^@]+}}@zed
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; CHECK-SAME: (%pair* byval [[DATA:%.*]])
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; CHECK-NEXT: [[DATA_0:%.*]] = getelementptr [[PAIR:%.*]], %pair* [[DATA]], i32 0, i32 0
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; CHECK-NEXT: [[DATA_0_VAL:%.*]] = load i32, i32* [[DATA_0]], align 4
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; CHECK-NEXT: [[DATA_1:%.*]] = getelementptr [[PAIR]], %pair* [[DATA]], i32 0, i32 1
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; CHECK-NEXT: [[DATA_1_VAL:%.*]] = load i32, i32* [[DATA_1]], align 4
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; CHECK-NEXT: call void @bar(i32 [[DATA_0_VAL]], i32 [[DATA_1_VAL]])
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; CHECK-NEXT: ret void
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;
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call void @bar(%pair* byval %Data)
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ret void
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}
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