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clang-p2996/llvm/test/TableGen
History
Rahul Joshi bee9664970 [TableGen] Emit OpName as an enum class instead of a namespace (#125313) 
- Change InstrInfoEmitter to emit OpName as an enum class
  instead of an anonymous enum in the OpName namespace.
- This will help clearly distinguish between values that are 
  OpNames vs just operand indices and should help avoid
  bugs due to confusion between the two.
- Rename OpName::OPERAND_LAST to NUM_OPERAND_NAMES.
- Emit declaration of getOperandIdx() along with the OpName
  enum so it doesn't have to be repeated in various headers.
- Also updated AMDGPU, RISCV, and WebAssembly backends
  to conform to the new definition of OpName (mostly
  mechanical changes).
2025-02-12 08:19:30 -08:00
..
Common
…
FixedLenDecoderEmitter
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GlobalISelCombinerEmitter
Make a tablegen test match-table.td more robust.
2024-10-08 13:16:06 +01:00
GlobalISelEmitter
[TableGen][GlobalISel] Reorder atomic predicate to preserve the order (#121806)
2025-01-16 17:06:21 +01:00
SDNodeInfoEmitter
[StrTable] Switch intrinsics to StringTable and work around MSVC (#123548)
2025-01-28 00:17:04 -08:00
64-bit-int.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
2003-08-03-PassCode.td
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2006-09-18-LargeInt.td
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2010-03-24-PrematureDefaults.td
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AcquireAtCycle.td
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address-space-patfrags.td
[TableGen][GlobalISel] Reorder atomic predicate to preserve the order (#121806)
2025-01-16 17:06:21 +01:00
AliasAsmString.td
[TableGen] Fix non-standard escape warnings for braces in InstAlias
2020-05-28 09:36:24 +00:00
AllowDuplicateRegisterNames.td
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ambiguous-composition.td
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AnonDefinitionOnDemand.td
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anonymous-location.td
[LIT] Rename substitution %basename_s to %{s:basename} (#111062)
2024-10-03 18:18:10 -07:00
arithmetic.td
[TableGen] [AMDGPU] Add !sub operator for subtraction
2020-10-28 12:27:53 -04:00
ArtificialSubregs.td
[TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (#114392)
2024-11-04 16:10:50 +00:00
AsmPredicateCombining.td
[AArch64] Add target feature "all"
2022-06-30 10:37:58 -07:00
AsmPredicateCombiningRISCV.td
[RISCV] Don't convert virtual register Register to MCRegister in isCompressibleInst. (#122843)
2025-01-13 23:36:09 -08:00
AsmPredicateCondsEmission.td
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AsmVariant.td
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AsmWriterPCRelOp.td
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assert.td
[TableGen] Print assert message inline with assert failure (#111184)
2024-10-04 13:21:50 -07:00
bare-minimum-psets.td
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BigEncoder.td
Change range operator from deprecated '-' to '...'
2020-09-12 16:26:32 -04:00
BitOffsetDecoder.td
[TableGen] Fix excessive compile time issue in FixedLenDecoderEmitter
2021-03-17 09:28:50 +00:00
BitsInit.td
[TableGen] Add assert to validate Objects list for HwModeSelect (#123794)
2025-01-27 13:44:44 -08:00
BitsInitErrors.td
[TableGen] Add assert to validate Objects list for HwModeSelect (#123794)
2025-01-27 13:44:44 -08:00
BitsInitOverflow.td
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cast-list-initializer.td
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cast-multiclass.td
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cast-string.td
[TableGen] Enhance !cast<string> to handle bit and bits types.
2021-01-14 10:20:35 -05:00
cast-typeerror.td
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cast.td
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check-duplicate-tuple-regs.td
[TableGen] Check for duplicate register tuple definitions. (#95725)
2024-06-25 16:42:29 -05:00
ClassInstanceValue.td
[TableGen] Fully resolve class-instance values before defs in multiclasses
2014-09-16 17:14:13 +00:00
code.td
[TableGen] Eliminate the 'code' type
2020-12-03 10:19:11 -05:00
CodeGenSchedule-duplicate-instrw.td
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compare.td
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CompressWriteLatencyEntry.td
[llvm-tblgen] CodeGenSchedModels::hasReadOfWrite gets wrong predication result
2022-09-19 14:22:43 +08:00
ConcatenatedSubregs.td
[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)
2024-03-27 12:19:28 -07:00
cond-bitlist.td
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cond-default.td
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cond-empty-list-arg.td
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cond-inheritance.td
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cond-let.td
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cond-list.td
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cond-subclass.td
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cond-type.td
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cond-usage.td
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condsbit.td
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ConstraintChecking1.td
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ConstraintChecking2.td
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ConstraintChecking3.td
[TableGen] Fix operand constraint checking problem. (#85859)
2024-03-20 13:32:38 -05:00
ConstraintChecking4.td
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ConstraintChecking5.td
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ConstraintChecking6.td
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ConstraintChecking7.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
ConstraintChecking8.td
[TableGen] Fix operand constraint checking problem. (#85859)
2024-03-20 13:32:38 -05:00
ConstraintChecking.inc
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CStyleComment.td
Remove 6 of XFAIL(s) in llvm/test/TableGen, since r193736. They have been XPASSing.
2013-11-10 14:25:44 +00:00
dag-functional.td
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dag-isel-complexpattern.td
[SelectionDAG] Add space-optimized forms of OPC_CheckComplexPat (#73310)
2024-01-11 15:28:12 +08:00
dag-isel-instrument.td
[llvm-tblgen] Increase Coverage Index Size (#118329)
2024-12-04 09:19:13 +00:00
dag-isel-regclass-emit-enum.td
[MVT][TableGen] Extend Machine Value Type to uint16_t (#99657)
2024-08-01 01:19:14 +08:00
dag-isel-res-order.td
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dag-isel-subregs.td
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Dag.td
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DAGDefaultOps.td
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def-multiple-operands.td
[TableGen][InstrInfoEmitter] Count sub-operands on def operands
2024-04-16 20:34:20 -04:00
defmclass.td
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DefmInherit.td
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DefmInsideMultiClass.td
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defset-typeerror.td
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defset.td
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deftype.td
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defvar.td
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detailed-records.td
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directive1.td
[TableGen] Add explicit symbol visibility macros to code generated (#107873)
2024-09-19 12:42:46 -07:00
directive2.td
[TableGen] Add explicit symbol visibility macros to code generated (#107873)
2024-09-19 12:42:46 -07:00
directive3.td
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dump.td
[TableGen] Resolve References at top level (#104578)
2024-08-19 21:05:39 +05:30
duplicate-include.inc
Tablegen: Remove the error for duplicate include files.
2019-11-20 18:24:10 -08:00
duplicate-include.td
Tablegen: Remove the error for duplicate include files.
2019-11-20 18:24:10 -08:00
DuplicateFieldValues.td
[tablegen] Delete duplicates from a vector without skipping elements
2016-12-01 19:38:50 +00:00
empty-psets.td
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empty.td
[TableGen] Enhance !empty and !size to handle strings and DAGs.
2020-10-19 09:22:20 -04:00
eq-unset.td
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eq.td
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eqbit.td
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exists-error-non-string.td
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exists-error-record.td
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exists-error-uninitialized.td
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exists.td
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FastISelEmitter.td
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field-access-initializers.td
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FieldAccess.td
TableGen: Allow !cast of records, cleanup conversion machinery
2018-03-06 13:48:39 +00:00
filter.td
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find.td
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foldl.td
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foreach-eval.td
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foreach-leak.td
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foreach-multiclass.td
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foreach-range-parse-errors0.td
[TableGen] Add true and false literals to represent booleans
2020-11-05 09:07:21 -05:00
foreach-range-parse-errors1.td
TableGen: Handle nontrivial foreach range bounds
2019-05-22 21:28:20 +00:00
foreach-range-parse-errors2.td
TableGen: Handle nontrivial foreach range bounds
2019-05-22 21:28:20 +00:00
foreach-range-parse-errors3.td
TableGen: Handle nontrivial foreach range bounds
2019-05-22 21:28:20 +00:00
foreach-range-parse-errors4.td
TableGen: Handle nontrivial foreach range bounds
2019-05-22 21:28:20 +00:00
foreach-range-parse-errors5.td
TableGen: Handle nontrivial foreach range bounds
2019-05-22 21:28:20 +00:00
foreach-variable-range.td
Update TableGen test files to use the new '...' range punctuation.
2020-09-12 16:26:32 -04:00
foreach.td
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ForeachList.td
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ForeachLoop.td
Update TableGen test files to use the new '...' range punctuation.
2020-09-12 16:26:32 -04:00
ForwardRef.td
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GeneralList.td
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generic-tables-instruction.td
[TableGen][NFC] Factor early-out range check. (#123645)
2025-01-20 19:13:31 -06:00
generic-tables-return-range.td
[TableGen] Add support for emitting new function definition to return a range of results for Primary Key (#96174)
2024-07-11 10:54:31 -07:00
generic-tables.td
[TableGen][NFC] Factor early-out range check. (#123645)
2025-01-20 19:13:31 -06:00
GenTags.td
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get-named-operand-idx.td
[TableGen] Emit OpName as an enum class instead of a namespace (#125313)
2025-02-12 08:19:30 -08:00
get-operand-type-no-expand.td
[TableGen][InstrInfo] Cull mapping that have not been enabled/not needed (#126137)
2025-02-10 08:16:12 -08:00
get-operand-type.td
[TableGen][InstrInfo] Cull mapping that have not been enabled/not needed (#126137)
2025-02-10 08:16:12 -08:00
getsetop.td
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HasNoUse.td
DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)
2024-06-13 11:52:22 +02:00
HwModeBitSet.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeAPInt.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeDecode2.td
[TableGen] Introduce a less aggressive suppression for HwMode Decoder… (#86060)
2024-04-01 17:19:46 +08:00
HwModeEncodeDecode3.td
[TableGen] Use bitwise operations to access HwMode ID. (#88377)
2024-05-04 20:08:26 -05:00
HwModeEncodeDecode.td
[TableGen] Fixes for per-HwMode decoding problem (#82201)
2024-02-19 13:14:22 +08:00
HwModeSelect.td
[TableGen] Add assert to validate Objects list for HwModeSelect (#123794)
2025-01-27 13:44:44 -08:00
HwModeSubRegs.td
[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)
2024-03-27 12:19:28 -07:00
if-empty-list-arg.td
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if-type.td
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if-unresolved-cast.td
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if.td
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ifbit.td
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ifstmt.td
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Include.inc
Regression is gone, don't try to find it on clean target.
2007-01-17 07:59:14 +00:00
Include.td
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inhibit-pset.td
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initialized.td
[llvm][TableGen] Add a !initialized predicate to allow testing for ? (#117964)
2024-12-17 20:34:35 -06:00
IntBitInit.td
Remove 6 of XFAIL(s) in llvm/test/TableGen, since r193736. They have been XPASSing.
2013-11-10 14:25:44 +00:00
interleave.td
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intrinsic-attrs.td
[LLVM][TableGen] Decrease code size of Intrinsic::getAttributes (#110573)
2024-10-01 09:08:47 -07:00
intrinsic-duplicate-name.td
[LLVM][TableGen] Add error check for duplicate intrinsic names (#109226)
2024-09-19 05:21:00 -07:00
intrinsic-long-name.td
[TableGen] Refactor Intrinsics record (#106986)
2024-09-04 15:04:10 -07:00
intrinsic-overload-conflict.td
[LLVM][TableGen] Refine overloaded intrinsic suffix check (#117957)
2024-12-03 13:33:15 -05:00
intrinsic-prefix-error.td
[TableGen] Add PrintError family overload that take a print function (#107333)
2024-09-07 05:13:54 -07:00
intrinsic-struct.td
[TableGen] Add check for number of intrinsic return values (#107326)
2024-09-05 14:52:30 -07:00
intrinsic-target-prefix-for-target-independent.td
[LLVM][TableGen] Check name conflicts between target dep and independent intrinsics (#109826)
2024-09-25 12:01:17 -07:00
intrinsic-varargs.td
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IntSpecialValues.td
[TableGen] Allow 2^63-1 and 2^63-2 as int literals.
2019-03-12 09:28:19 +00:00
invalid-macro-name-command-line.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
invalid-type-cast-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
InvalidMCSchedClassDesc.td
[MCA] Add support for in-order CPUs
2021-03-04 14:08:19 +03:00
isa.td
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JSON-check.py
[NFC][Py Reformat] Reformat python files in llvm
2023-05-17 10:48:52 +02:00
JSON-locs.td
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JSON.td
[TableGen] Include source location in JSON dump (#79028)
2024-01-24 17:07:20 +00:00
LazyChange.td
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LetInsideMultiClasses.td
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letUnknownValue.td
[llvm][TableGen] Fix misleading error for invalid use of let (#118616)
2024-12-09 13:21:46 +00:00
lisp.td
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list-element-bitref.td
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ListArgs.td
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ListArgsSimple.td
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listconcat.td
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ListConversion.td
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listflatten-error.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
listflatten.td
[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)
2024-09-24 12:24:17 -07:00
ListManip.td
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ListOfList.td
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listpaste.td
TableGen: Allow lists to be concatenated through '#'
2019-03-05 17:16:07 +00:00
listremove.td
[TableGen] Add a !listremove() bang operator
2022-12-09 15:03:18 +00:00
ListSlices-fail.td
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ListSlices.td
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listsplat.td
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lit.local.cfg
[AIX] Use internal lit shell for TableGen instead of a global setting (#113627)
2024-10-25 13:06:02 -04:00
LoLoL.td
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MacroFusion.td
[TableGen] Fix MacroFusion.td
2024-04-01 18:32:55 +08:00
math.td
[TableGen] Add log bang operator
2022-10-26 09:16:32 -07:00
MissingOperandField.td
[TableGen] Delete support for deprecated positional matching.
2023-03-07 15:04:09 -05:00
MixedCasedMnemonic.td
[StrTable] Switch intrinsics to StringTable and work around MSVC (#123548)
2025-01-28 00:17:04 -08:00
MnemonicAlias.td
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MultiClass-def-fail.td
[TableGen] Give meaningful msg for def use in multiclass
2019-03-26 10:49:09 +00:00
MultiClass-defm-fail.td
TableGen: Streamline how defs are instantiated
2018-03-21 17:12:53 +00:00
MultiClass-defm.td
TableGen: Allow NAME in template arguments in defm in multiclass
2018-03-05 14:01:38 +00:00
MultiClass.td
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MultiClassDefName.td
TableGen: Streamline the semantics of NAME
2018-06-04 14:26:05 +00:00
MultiClassInherit.td
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MultiPat.td
TableGen: Reimplement !foreach using the resolving mechanism
2018-03-05 15:21:04 +00:00
multiple-type-casts-patfrags.td
[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)
2024-10-01 11:17:00 +04:00
name-resolution-consistency.td
…
named-arguments.td
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nested_ifdef2.inc
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nested_ifdef_main.td
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nested_ifdef.inc
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nested-comment.td
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NestedForeach.td
TableGen: Allow foreach in multiclass to depend on template args
2018-06-21 13:35:44 +00:00
nul-char.td
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paste-reserved.td
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Paste.td
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pr8330.td
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predicate-patfags.td
[TableGen] HasOneUse builtin predicate on PatFrags (#91578)
2024-05-20 06:18:49 -08:00
prep-diag1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag3.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag4.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag5.td
…
prep-diag6.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag7.td
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prep-diag8.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag9.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag10.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag11-include.inc
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prep-diag11.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag12-include.inc
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prep-diag12.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag13.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-diag14.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-1.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef-diag-2.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
prep-ifndef.td
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prep-region-include.inc
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prep-region-processing.td
[llvm] NFC: Fix trivial typo in rst and td files
2020-04-23 14:26:32 +09:00
ProcessorUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
pset-enum.td
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pseudo-inst-expansion.td
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range-lists.td
Update TableGen test files to use the new '...' range punctuation.
2020-09-12 16:26:32 -04:00
range-op-fail.td
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range-op.td
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rc-weight-override.td
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ReadAdvanceInvalidWrite.td
[CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (#82685)
2024-02-26 18:25:21 -08:00
RegBankFromRegClass.td
[GISel][TableGen] Generate getRegBankFromRegClass (#99896)
2024-07-25 09:41:55 -04:00
RegisterBankEmitter.td
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RegisterClass.td
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RegisterEncoder.td
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RegisterInfoEmitter-BaseClassOrder.td
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RegisterInfoEmitter-regcost-list.td
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RegisterInfoEmitter-regcost-tuple.td
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RegisterInfoEmitter-regcost.td
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RegisterInfoEmitter-tsflags.td
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RelTest.td
[mips] Improve diagnostics for instruction mapping
2018-01-08 16:25:40 +00:00
repr.td
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riscv-target-def.td
[RISCV] Add mvendorid/marchid/mimpid to CPU definitions (#116202)
2024-11-22 22:58:54 +08:00
SchedModelError.td
[TableGen] Track reference locations of Records/RecordVals
2022-09-27 23:48:16 -07:00
searchabletables-intrinsic.td
[TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (#107339)
2024-09-07 15:11:34 -07:00
self-reference-recursion.td
TableGen: Explicitly forbid self-references to field members
2018-03-19 14:14:28 +00:00
self-reference-typeerror.td
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self-reference.td
[TableGen] Fix anonymous record self-reference in foreach and multiclass
2021-02-01 10:59:07 -05:00
SetTheory.td
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SiblingForeach.td
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simplify-patfrag.td
[TableGen] ShouldIgnore Pattern bit to disable DAG pattern imports during GISel (#88382)
2024-04-25 16:42:48 -04:00
size.td
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Slice.td
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spurious-semi.td
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strconcat.td
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string_ops.td
[TableGen] add !toupper and !tolower operators to change the casing of strings.
2023-03-07 12:41:56 +00:00
String.td
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subst2.td
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subst.td
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substr.td
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SubtargetFeatureUniqueNames.td
[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)
2024-08-08 02:00:36 +03:00
SuperSubclassSameName.td
…
TargetInstrInfo.td
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TargetInstrSpec.td
TableGen: Reimplement !foreach using the resolving mechanism
2018-03-05 15:21:04 +00:00
template-arg-dependency.td
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template-args.td
[TableGen] Do not exit in template argument check (#121636)
2025-01-06 21:06:17 +01:00
TemplateArgRename.td
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Tree.td
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TreeNames.td
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true-false.td
[TableGen] Make !and and !or short-circuit (#113963)
2024-11-07 10:22:03 -08:00
trydecode-emission2.td
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trydecode-emission3.td
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trydecode-emission4.td
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trydecode-emission.td
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TwoLevelName.td
Add test cases that will show the bug that was fixed in r256725.
2016-01-13 07:53:11 +00:00
UnsetBitInit.td
Update TableGen test files to use the new '...' range punctuation.
2020-09-12 16:26:32 -04:00
unsetop.td
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unterminated-c-comment-include.inc
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unterminated-c-comment.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
unterminated-code-block-include.inc
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unterminated-code-block.td
[LLVM] Change error messages to start with lower case (#113748)
2024-10-29 12:26:33 -07:00
UnterminatedComment.td
…
usevalname.td
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ValidIdentifiers.td
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VarLenDecoder.td
[NFC][TableGen] Refine the check in Decoder
2023-02-09 16:14:38 +08:00
VarLenEncoder.td
Let M68kMCCodeEmitter set Scratch size. (#69898)
2023-10-26 14:43:38 +02:00
VarLenEncoderHwModes.td
[Tablegen] Bugfix and refactor VarLenCodeEmitter HwModes. (#68795)
2023-10-20 07:21:24 +02:00
warn-unused-template-arg.td
…
x86-fold-tables.inc
[X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (#123335)
2025-01-24 15:49:28 +08:00
x86-fold-tables.td
[TableGen] Handle Windows line endings in x86-fold-tables.td test (#112997)
2024-10-21 09:58:59 -07:00
x86-instr-mapping.inc
[X86][APX] Support APX + AMX-MOVRS/AMX-TRANSPOSE (#123267)
2025-01-17 17:51:42 +08:00
x86-instr-mapping.td
Test added for x86-instr-mapping (#115170)
2024-11-07 19:09:21 +08:00