0c70a26f46
The reordering of the root node can be safely cleared only if the root node is not reused, otherwise the graph might be broken Fixes #125357
107 lines
4.8 KiB
LLVM
107 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
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@d = global i32 0, align 4
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@c = global i32 0, align 4
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@f = global i32 0, align 4
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@b = global i32 0, align 4
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@a = global i32 0, align 4
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@e = global i32 0, align 4
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define i32 @test() {
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; CHECK-LABEL: define i32 @test() {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @d, align 4
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; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TMP0]], 0
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; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label %[[IF_END6:.*]], label %[[IF_THEN:.*]]
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; CHECK: [[IF_THEN]]:
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @c, align 4
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; CHECK-NEXT: [[TMP2:%.*]] = load volatile i32, ptr @f, align 4
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; CHECK-NEXT: [[TOBOOL1_NOT:%.*]] = icmp eq i32 [[TMP2]], 0
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; CHECK-NEXT: br i1 [[TOBOOL1_NOT]], label %[[IF_END:.*]], label %[[I:.*]]
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; CHECK: [[IF_END]]:
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; CHECK-NEXT: [[TMP3:%.*]] = load volatile i32, ptr @f, align 4
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; CHECK-NEXT: [[TOBOOL3_NOT:%.*]] = icmp eq i32 [[TMP3]], 0
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; CHECK-NEXT: br i1 [[TOBOOL3_NOT]], label %[[IF_END6]], label %[[I]]
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; CHECK: [[IF_END6]]:
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; CHECK-NEXT: [[H_0:%.*]] = phi i32 [ [[TMP1]], %[[IF_END]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr @b, align 4
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; CHECK-NEXT: [[TOBOOL7_NOT:%.*]] = icmp eq i32 [[TMP4]], 0
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; CHECK-NEXT: br i1 [[TOBOOL7_NOT]], label %[[IF_END13:.*]], label %[[I]]
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; CHECK: [[LAND_RHS:.*]]:
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; CHECK-NEXT: [[TMP5:%.*]] = load volatile i32, ptr @f, align 4
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; CHECK-NEXT: br label %[[IF_END13]]
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; CHECK: [[IF_END13]]:
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; CHECK-NEXT: [[H_2:%.*]] = phi i32 [ [[H_0]], %[[IF_END6]] ], [ [[H_1:%.*]], %[[LAND_RHS]] ], [ [[H_1]], %[[I]] ]
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; CHECK-NEXT: [[J_1:%.*]] = phi i32 [ [[TMP0]], %[[IF_END6]] ], [ [[J_0:%.*]], %[[LAND_RHS]] ], [ [[J_0]], %[[I]] ]
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; CHECK-NEXT: [[K_1:%.*]] = phi i32 [ [[TMP0]], %[[IF_END6]] ], [ [[K_0:%.*]], %[[LAND_RHS]] ], [ [[K_0]], %[[I]] ]
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; CHECK-NEXT: [[L_1:%.*]] = phi i32 [ [[TMP0]], %[[IF_END6]] ], [ [[L_0:%.*]], %[[LAND_RHS]] ], [ [[L_0]], %[[I]] ]
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; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr @a, align 4
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; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr @e, align 4
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; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[TMP6]], [[TMP7]]
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; CHECK-NEXT: br i1 [[CMP_NOT]], label %[[IF_END15:.*]], label %[[I]]
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; CHECK: [[I]]:
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; CHECK-NEXT: [[J_0]] = phi i32 [ 0, %[[IF_THEN]] ], [ [[J_1]], %[[IF_END13]] ], [ 0, %[[IF_END]] ], [ [[TMP0]], %[[IF_END6]] ]
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; CHECK-NEXT: [[K_0]] = phi i32 [ 0, %[[IF_THEN]] ], [ [[K_1]], %[[IF_END13]] ], [ 0, %[[IF_END]] ], [ [[TMP0]], %[[IF_END6]] ]
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; CHECK-NEXT: [[L_0]] = phi i32 [ 0, %[[IF_THEN]] ], [ [[L_1]], %[[IF_END13]] ], [ 0, %[[IF_END]] ], [ [[TMP0]], %[[IF_END6]] ]
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; CHECK-NEXT: [[H_1]] = phi i32 [ [[TMP1]], %[[IF_THEN]] ], [ [[H_2]], %[[IF_END13]] ], [ [[TMP1]], %[[IF_END]] ], [ [[H_0]], %[[IF_END6]] ]
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[J_0]], [[H_1]]
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; CHECK-NEXT: [[OR9:%.*]] = or i32 [[OR]], [[K_0]]
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; CHECK-NEXT: [[OR10:%.*]] = or i32 [[OR9]], [[L_0]]
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; CHECK-NEXT: [[TOBOOL11_NOT:%.*]] = icmp eq i32 [[OR10]], 0
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; CHECK-NEXT: br i1 [[TOBOOL11_NOT]], label %[[IF_END13]], label %[[LAND_RHS]]
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; CHECK: [[IF_END15]]:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%0 = load i32, ptr @d, align 4
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%tobool.not = icmp eq i32 %0, 0
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br i1 %tobool.not, label %if.end6, label %if.then
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if.then:
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%1 = load i32, ptr @c, align 4
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%2 = load volatile i32, ptr @f, align 4
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%tobool1.not = icmp eq i32 %2, 0
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br i1 %tobool1.not, label %if.end, label %i
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if.end:
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%3 = load volatile i32, ptr @f, align 4
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%tobool3.not = icmp eq i32 %3, 0
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br i1 %tobool3.not, label %if.end6, label %i
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if.end6:
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%h.0 = phi i32 [ %1, %if.end ], [ 0, %entry ]
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%4 = load i32, ptr @b, align 4
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%tobool7.not = icmp eq i32 %4, 0
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br i1 %tobool7.not, label %if.end13, label %i
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land.rhs:
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%5 = load volatile i32, ptr @f, align 4
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br label %if.end13
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if.end13:
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%h.2 = phi i32 [ %h.0, %if.end6 ], [ %h.1, %land.rhs ], [ %h.1, %i ]
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%j.1 = phi i32 [ %0, %if.end6 ], [ %j.0, %land.rhs ], [ %j.0, %i ]
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%k.1 = phi i32 [ %0, %if.end6 ], [ %k.0, %land.rhs ], [ %k.0, %i ]
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%l.1 = phi i32 [ %0, %if.end6 ], [ %l.0, %land.rhs ], [ %l.0, %i ]
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%6 = load i32, ptr @a, align 4
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%7 = load i32, ptr @e, align 4
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%cmp.not = icmp eq i32 %6, %7
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br i1 %cmp.not, label %if.end15, label %i
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i:
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%j.0 = phi i32 [ 0, %if.then ], [ %j.1, %if.end13 ], [ 0, %if.end ], [ %0, %if.end6 ]
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%k.0 = phi i32 [ 0, %if.then ], [ %k.1, %if.end13 ], [ 0, %if.end ], [ %0, %if.end6 ]
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%l.0 = phi i32 [ 0, %if.then ], [ %l.1, %if.end13 ], [ 0, %if.end ], [ %0, %if.end6 ]
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%h.1 = phi i32 [ %1, %if.then ], [ %h.2, %if.end13 ], [ %1, %if.end ], [ %h.0, %if.end6 ]
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%or = or i32 %j.0, %h.1
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%or9 = or i32 %or, %k.0
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%or10 = or i32 %or9, %l.0
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%tobool11.not = icmp eq i32 %or10, 0
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br i1 %tobool11.not, label %if.end13, label %land.rhs
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if.end15:
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ret i32 0
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}
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