25ae1a266d
With the removal of mlir-vulkan-runner (as part of #73457) ine7e3c45bc7, this pass no longer has to be public (previously it had to be so the runner could use it). This commit makes it instead only available for use by mlir-opt. This is a recommit of058d183980(#124301) which had been reverted in4573c857dadue to a missing linker dependency on MLIRSPIRVTransforms in mlir/test/lib/Pass/CMakeLists.txt (fixed in this commit).
66 lines
4.4 KiB
MLIR
66 lines
4.4 KiB
MLIR
// RUN: mlir-opt -test-convert-to-spirv="run-signature-conversion=false run-vector-unrolling=false" -cse %s | FileCheck %s
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module attributes {
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spirv.target_env = #spirv.target_env<
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#spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>>
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} {
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// CHECK-LABEL: @load_store_float_rank_zero
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// CHECK-SAME: %[[ARG0:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<1 x f32, stride=4> [0])>, StorageBuffer>, %[[ARG1:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<1 x f32, stride=4> [0])>, StorageBuffer>
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// CHECK: %[[CST0:.*]] = spirv.Constant 0 : i32
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// CHECK: %[[AC0:.*]] = spirv.AccessChain %[[ARG0]][%[[CST0]], %[[CST0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<1 x f32, stride=4> [0])>, StorageBuffer>, i32, i32
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// CHECK: %[[LOAD:.*]] = spirv.Load "StorageBuffer" %[[AC0]] : f32
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// CHECK: %[[AC1:.*]] = spirv.AccessChain %[[ARG1]][%[[CST0]], %[[CST0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<1 x f32, stride=4> [0])>, StorageBuffer>, i32, i32
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// CHECK: spirv.Store "StorageBuffer" %[[AC1]], %[[LOAD]] : f32
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// CHECK: spirv.Return
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func.func @load_store_float_rank_zero(%arg0: memref<f32>, %arg1: memref<f32>) {
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%0 = memref.load %arg0[] : memref<f32>
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memref.store %0, %arg1[] : memref<f32>
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return
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}
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// CHECK-LABEL: @load_store_int_rank_one
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// CHECK-SAME: %[[ARG0:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<4 x i32, stride=4> [0])>, StorageBuffer>, %[[ARG1:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<4 x i32, stride=4> [0])>, StorageBuffer>, %[[ARG2:.*]]: i32
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// CHECK: %[[CST0:.*]] = spirv.Constant 0 : i32
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// CHECK: %[[AC0:.*]] = spirv.AccessChain %[[ARG0]][%[[CST0]], %[[ARG2]]] : !spirv.ptr<!spirv.struct<(!spirv.array<4 x i32, stride=4> [0])>, StorageBuffer>, i32, i32
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// CHECK: %[[LOAD:.*]] = spirv.Load "StorageBuffer" %[[AC0]] : i32
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// CHECK: %[[AC1:.*]] = spirv.AccessChain %[[ARG1]][%[[CST0]], %[[ARG2]]] : !spirv.ptr<!spirv.struct<(!spirv.array<4 x i32, stride=4> [0])>, StorageBuffer>, i32, i32
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// CHECK: spirv.Store "StorageBuffer" %[[AC1]], %[[LOAD]] : i32
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// CHECK: spirv.Return
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func.func @load_store_int_rank_one(%arg0: memref<4xi32>, %arg1: memref<4xi32>, %arg2 : index) {
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%0 = memref.load %arg0[%arg2] : memref<4xi32>
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memref.store %0, %arg1[%arg2] : memref<4xi32>
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return
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}
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// CHECK-LABEL: @load_store_larger_memref
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// CHECK-SAME: %[[ARG0:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<8 x i32, stride=4> [0])>, StorageBuffer>, %[[ARG1:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<8 x i32, stride=4> [0])>, StorageBuffer>, %[[ARG2:.*]]: i32
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// CHECK: %[[CST0:.*]] = spirv.Constant 0 : i32
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// CHECK: %[[AC0:.*]] = spirv.AccessChain %[[ARG0]][%[[CST0]], %[[ARG2]]] : !spirv.ptr<!spirv.struct<(!spirv.array<8 x i32, stride=4> [0])>, StorageBuffer>, i32, i32
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// CHECK: %[[LOAD:.*]] = spirv.Load "StorageBuffer" %[[AC0]] : i32
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// CHECK: %[[AC1:.*]] = spirv.AccessChain %[[ARG1]][%[[CST0]], %[[ARG2]]] : !spirv.ptr<!spirv.struct<(!spirv.array<8 x i32, stride=4> [0])>, StorageBuffer>, i32, i32
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// CHECK: spirv.Store "StorageBuffer" %[[AC1]], %[[LOAD]] : i32
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// CHECK: spirv.Return
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func.func @load_store_larger_memref(%arg0: memref<8xi32>, %arg1: memref<8xi32>, %arg2 : index) {
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%0 = memref.load %arg0[%arg2] : memref<8xi32>
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memref.store %0, %arg1[%arg2] : memref<8xi32>
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return
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}
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// CHECK-LABEL: @load_store_vector
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// CHECK-SAME: %[[ARG0:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<1 x vector<4xi32>, stride=16> [0])>, StorageBuffer>, %[[ARG1:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<1 x vector<4xi32>, stride=16> [0])>, StorageBuffer>
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// CHECK: %[[CST0:.*]] = spirv.Constant 0 : i32
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// CHECK: %[[AC0:.*]] = spirv.AccessChain %[[ARG0]][%[[CST0]], %[[CST0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<1 x vector<4xi32>, stride=16> [0])>, StorageBuffer>, i32, i32
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// CHECK: %[[LOAD:.*]] = spirv.Load "StorageBuffer" %[[AC0]] : vector<4xi32>
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// CHECK: %[[AC1:.*]] = spirv.AccessChain %[[ARG1]][%[[CST0]], %[[CST0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<1 x vector<4xi32>, stride=16> [0])>, StorageBuffer>, i32, i32
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// CHECK: spirv.Store "StorageBuffer" %[[AC1]], %[[LOAD]] : vector<4xi32>
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// CHECK: spirv.Return
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func.func @load_store_vector(%arg0: memref<vector<4xi32>>, %arg1: memref<vector<4xi32>>) {
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%0 = memref.load %arg0[] : memref<vector<4xi32>>
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memref.store %0, %arg1[] : memref<vector<4xi32>>
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return
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}
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} // end module
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