Simon Moll f27423027d [VE] Enable v256 fcmp true|false tests ...

The broadcast patterns for all-true|false masks are available now.
Enable the true|fast fcmp predicate tests that use them.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D119936

2022-02-18 13:26:18 +01:00

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expand_single_elem_build_vec.ll

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extract_elt.ll

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fastcc_callee.ll

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fastcc_caller.ll

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feature_vpu.ll

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insert_elt.ll

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mask_binary.ll

[VE] v256i1 and|or|xor isel and tests

2022-02-14 08:47:06 +01:00

mask_broadcast.ll

[VE] v256i1 broadcast isel and tests

2022-02-15 12:40:51 +01:00

vec_add.ll

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vec_and.ll

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vec_broadcast.ll

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vec_fcmp.ll

[VE] Enable v256 fcmp true|false tests

2022-02-18 13:26:18 +01:00

vec_icmp.ll

[VE] v256.32|64 setcc isel and tests

2022-02-08 13:20:55 +01:00

vec_select.ll

[VE] select|vp.merge|vp.select v256 isel and tests

2022-01-17 15:58:54 +01:00

vp_add.ll

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vp_and.ll

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vp_ashr.ll

[VE] SHL,SRA,SRL v256i32|64 isel and tests

2021-12-15 11:32:18 +01:00

vp_fadd_merge.ll

[VE] vp_select+vectorBinOp passthru isel and tests

2022-01-18 11:31:14 +01:00

vp_fadd.ll

[VE] FADD,FSUB,FMUL,FDIV v256f32|f64 isel and tests

2021-12-21 09:15:31 +01:00

vp_fdiv_merge.ll

[VE] vp_select+vectorBinOp passthru isel and tests

2022-01-18 11:31:14 +01:00

vp_fdiv.ll

[VE] FADD,FSUB,FMUL,FDIV v256f32|f64 isel and tests

2021-12-21 09:15:31 +01:00

vp_fmul_merge.ll

[VE] vp_select+vectorBinOp passthru isel and tests

2022-01-18 11:31:14 +01:00

vp_fmul.ll

[VE] FADD,FSUB,FMUL,FDIV v256f32|f64 isel and tests

2021-12-21 09:15:31 +01:00

vp_fsub_merge.ll

[VE] vp_select+vectorBinOp passthru isel and tests

2022-01-18 11:31:14 +01:00

vp_fsub.ll

[VE] FADD,FSUB,FMUL,FDIV v256f32|f64 isel and tests

2021-12-21 09:15:31 +01:00

vp_lshr.ll

[VE] SHL,SRA,SRL v256i32|64 isel and tests

2021-12-15 11:32:18 +01:00

vp_merge.ll

[VE] select|vp.merge|vp.select v256 isel and tests

2022-01-17 15:58:54 +01:00

vp_mul.ll

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vp_or.ll

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vp_sdiv.ll

[VE] U|SDIV v256i32|64 isel and tests

2021-12-21 08:51:01 +01:00

vp_select.ll

[VE] select|vp.merge|vp.select v256 isel and tests

2022-01-17 15:58:54 +01:00

vp_shl.ll

[VE] SHL,SRA,SRL v256i32|64 isel and tests

2021-12-15 11:32:18 +01:00

vp_sra.ll

[VE] SHL,SRA,SRL v256i32|64 isel and tests

2021-12-15 11:32:18 +01:00

vp_srem.ll

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vp_srl.ll

[VE] SHL,SRA,SRL v256i32|64 isel and tests

2021-12-15 11:32:18 +01:00

vp_sub.ll

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vp_udiv.ll

[VE] U|SDIV v256i32|64 isel and tests

2021-12-21 08:51:01 +01:00

vp_urem.ll

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vp_xor.ll

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