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clang-p2996/llvm/lib/CodeGen/GlobalISel
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Matt Arsenault 88bdcbbf1a GlobalISel: Lift store value widening restriction 
This doesn't change the memory size and doesn't need to worry about
non-power-of-2 sizes.
2020-09-16 14:25:07 -04:00
..
CallLowering.cpp
[GlobalISel][CallLowering] NFC: Unify flag-setting from CallBase + AttributeList
2020-08-18 11:07:33 -07:00
CMakeLists.txt
[GlobalISel] Introduce InlineAsmLowering class
2020-04-20 15:10:18 +02:00
Combiner.cpp
[GlobalISel] fix a compilation error with gcc 6.3.0
2020-08-28 09:16:52 -07:00
CombinerHelper.cpp
[GISel] Add new combines for unary FP instrs with constant operand
2020-09-16 10:34:15 -07:00
CSEInfo.cpp
[GISel]: Fix one more CSE Non determinism
2020-08-27 09:06:21 -07:00
CSEMIRBuilder.cpp
[GISel]: Fix one more CSE Non determinism
2020-08-27 09:06:21 -07:00
GISelChangeObserver.cpp
GlobalISel: Use Register
2020-08-19 13:45:31 -04:00
GISelKnownBits.cpp
[KnownBits] Implement accurate unsigned and signed max and min
2020-09-07 09:09:01 +01:00
GlobalISel.cpp
…
InlineAsmLowering.cpp
[GlobalISel][InlineAsm] Fix matching input constraint to physreg
2020-08-06 14:35:51 +02:00
InstructionSelect.cpp
GlobalISel: Move finalizeLowering call later
2020-07-06 09:19:40 -04:00
InstructionSelector.cpp
…
IRTranslator.cpp
GlobalISel/IRTranslator resetTargetOptions based on function attributes
2020-09-15 10:26:09 +02:00
LegalityPredicates.cpp
Fix wrong comment about enabling optimizations to work around a bug
2020-09-10 16:45:20 -07:00
LegalizeMutations.cpp
GlobalISel: Add scalarSameSizeAs LegalizeRule
2020-07-23 21:17:31 -04:00
Legalizer.cpp
GlobalISel: Improve dead instruction debug printing
2020-08-24 10:12:00 -04:00
LegalizerHelper.cpp
GlobalISel: Lift store value widening restriction
2020-09-16 14:25:07 -04:00
LegalizerInfo.cpp
GlobalISel: Don't assert on operations with no type indices
2020-07-28 16:49:55 -04:00
LLVMBuild.txt
…
Localizer.cpp
…
LostDebugLocObserver.cpp
Give helpers internal linkage. NFC.
2020-04-25 11:50:52 +02:00
MachineIRBuilder.cpp
[GlobalISel] Implement bit-test switch table optimization.
2020-08-12 11:31:39 -07:00
RegBankSelect.cpp
[GlobalISel][InlineAsm] Add support for basic output operand constraints
2020-05-06 10:06:13 +02:00
RegisterBank.cpp
Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes"
2020-03-20 11:02:50 +01:00
RegisterBankInfo.cpp
Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes"
2020-03-20 11:02:50 +01:00
Utils.cpp
AMDGPU/GlobalISel Check for NoNaNsFPMath in isKnownNeverSNaN
2020-09-14 12:11:00 +02:00