Hsiangkai Wang 5f996705e0 [RISCV] Half-precision for vget/vset. ...

Differential Revision: https://reviews.llvm.org/D107433

2021-08-09 17:38:15 +08:00

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rvb-intrinsics

[RISCV] [1/2] Add IR intrinsic for Zbe extension

2021-04-25 19:14:34 -07:00

rvv-intrinsics

[RISCV] Half-precision for vget/vset.

2021-08-09 17:38:15 +08:00

rvv-intrinsics-overloaded

[Clang][RISCV] Implement vsoxseg and vsuxseg.

2021-07-22 09:24:41 +08:00

riscv32-ilp32-abi.c

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riscv32-ilp32-ilp32f-abi.c

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riscv32-ilp32-ilp32f-ilp32d-abi.c

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riscv32-ilp32d-abi.c

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riscv32-ilp32f-abi.c

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riscv32-ilp32f-ilp32d-abi.c

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riscv64-lp64-abi.c

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riscv64-lp64-lp64f-abi.c

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riscv64-lp64-lp64f-lp64d-abi.c

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riscv64-lp64d-abi.c

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riscv64-lp64f-lp64d-abi.c

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riscv-atomics.c

NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg.

2021-02-11 17:35:09 -05:00

riscv-attr-builtin-alias-err.c

[Clang] Add clang attribute clang_builtin_alias.

2021-04-25 08:49:19 +08:00

riscv-attr-builtin-alias.c

[Clang] Add clang attribute clang_builtin_alias.

2021-04-25 08:49:19 +08:00

riscv-inline-asm-rvv.c

[RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR.

2021-08-01 05:58:17 +08:00

riscv-inline-asm.c

[RISCV] Support machine constraint "S"

2021-07-13 09:30:09 -07:00

riscv-metadata.c

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riscv-sdata-module-flag.c

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riscv-v-debuginfo.c

[Clang][RISCV] Define RISC-V V builtin types

2021-02-18 10:17:31 +08:00

riscv-v-lifetime.cpp

[Clang][CodeGen] Set the size of llvm.lifetime to unknown for scalable types.

2021-06-07 23:30:13 +08:00

rvv_errors.c

[RISCV] Validate the SEW and LMUL operands to __builtin_rvv_vsetvli(max)

2021-05-10 12:11:13 -07:00