b8baa2a913
This patch changes the AArch32 crypto instructions (sha2 and aes) to require the specific sha2 or aes features. These features have already been implemented and can be controlled through the command line, but do not have the expected result (i.e. `+noaes` will not disable aes instructions). The crypto feature retains its existing meaning of both sha2 and aes. Several small changes are included due to the knock-on effect this has: - The AArch32 driver has been modified to ensure sha2/aes is correctly set based on arch/cpu/fpu selection and feature ordering. - Crypto extensions are permitted for AArch32 v8-R profile, but not enabled by default. - ACLE feature macros have been updated with the fine grained crypto algorithms. These are also used by AArch64. - Various tests updated due to the change in feature lists and macros. Reviewed By: lenary Differential Revision: https://reviews.llvm.org/D99079
95 lines
3.0 KiB
C
95 lines
3.0 KiB
C
// RUN: %clang_cc1 -triple arm64-apple-ios7.0 -target-feature +neon -target-feature +aes -target-feature +sha2 -ffreestanding -Os -S -o - %s | FileCheck %s
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// RUN: %clang_cc1 -triple arm64-apple-ios7.0 -target-feature +neon -target-feature +aes -target-feature +sha2 -ffreestanding -fexperimental-new-pass-manager -Os -S -o - %s | FileCheck %s
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// REQUIRES: aarch64-registered-target
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#include <arm_neon.h>
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uint8x16_t test_aese(uint8x16_t data, uint8x16_t key) {
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// CHECK-LABEL: test_aese:
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// CHECK: aese.16b v0, v1
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return vaeseq_u8(data, key);
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}
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uint8x16_t test_aesd(uint8x16_t data, uint8x16_t key) {
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// CHECK-LABEL: test_aesd:
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// CHECK: aesd.16b v0, v1
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return vaesdq_u8(data, key);
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}
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uint8x16_t test_aesmc(uint8x16_t data, uint8x16_t key) {
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// CHECK-LABEL: test_aesmc:
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// CHECK: aesmc.16b v0, v0
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return vaesmcq_u8(data);
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}
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uint8x16_t test_aesimc(uint8x16_t data, uint8x16_t key) {
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// CHECK-LABEL: test_aesimc:
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// CHECK: aesimc.16b v0, v0
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return vaesimcq_u8(data);
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}
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uint32x4_t test_sha1c(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) {
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// CHECK-LABEL: test_sha1c:
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// CHECK: fmov [[HASH_E:s[0-9]+]], w0
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// CHECK: sha1c.4s q0, [[HASH_E]], v1
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return vsha1cq_u32(hash_abcd, hash_e, wk);
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}
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uint32x4_t test_sha1p(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) {
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// CHECK-LABEL: test_sha1p:
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// CHECK: fmov [[HASH_E:s[0-9]+]], w0
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// CHECK: sha1p.4s q0, [[HASH_E]], v1
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return vsha1pq_u32(hash_abcd, hash_e, wk);
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}
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uint32x4_t test_sha1m(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) {
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// CHECK-LABEL: test_sha1m:
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// CHECK: fmov [[HASH_E:s[0-9]+]], w0
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// CHECK: sha1m.4s q0, [[HASH_E]], v1
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return vsha1mq_u32(hash_abcd, hash_e, wk);
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}
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uint32_t test_sha1h(uint32_t hash_e) {
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// CHECK-LABEL: test_sha1h:
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// CHECK: fmov [[HASH_E:s[0-9]+]], w0
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// CHECK: sha1h [[RES:s[0-9]+]], [[HASH_E]]
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// CHECK: fmov w0, [[RES]]
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return vsha1h_u32(hash_e);
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}
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uint32x4_t test_sha1su0(uint32x4_t wk0_3, uint32x4_t wk4_7, uint32x4_t wk8_11) {
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// CHECK-LABEL: test_sha1su0:
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// CHECK: sha1su0.4s v0, v1, v2
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return vsha1su0q_u32(wk0_3, wk4_7, wk8_11);
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}
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uint32x4_t test_sha1su1(uint32x4_t wk0_3, uint32x4_t wk12_15) {
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// CHECK-LABEL: test_sha1su1:
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// CHECK: sha1su1.4s v0, v1
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return vsha1su1q_u32(wk0_3, wk12_15);
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}
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uint32x4_t test_sha256h(uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk) {
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// CHECK-LABEL: test_sha256h:
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// CHECK: sha256h.4s q0, q1, v2
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return vsha256hq_u32(hash_abcd, hash_efgh, wk);
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}
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uint32x4_t test_sha256h2(uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk) {
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// CHECK-LABEL: test_sha256h2:
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// CHECK: sha256h2.4s q0, q1, v2
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return vsha256h2q_u32(hash_efgh, hash_abcd, wk);
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}
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uint32x4_t test_sha256su0(uint32x4_t w0_3, uint32x4_t w4_7) {
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// CHECK-LABEL: test_sha256su0:
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// CHECK: sha256su0.4s v0, v1
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return vsha256su0q_u32(w0_3, w4_7);
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}
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uint32x4_t test_sha256su1(uint32x4_t w0_3, uint32x4_t w8_11, uint32x4_t w12_15) {
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// CHECK-LABEL: test_sha256su1:
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// CHECK: sha256su1.4s v0, v1, v2
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return vsha256su1q_u32(w0_3, w8_11, w12_15);
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}
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