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clang-p2996/llvm/lib/Target/AMDGPU
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Matt Arsenault 79bcd4a7db AMDGPU: Remove FeatureLocalMemorySize0 
There's no reason to make this an explicit feature, since it's implied
by the lack of a feature with a size.
2021-09-02 22:43:01 -04:00
..
AsmParser
[AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions
2021-07-22 10:42:15 +09:00
Disassembler
[AMDGPU] Make BVH isel consistent with other MIMG opcodes
2021-08-17 10:42:22 +09:00
MCA
[MCA] Adding an AMDGPUCustomBehaviour implementation.
2021-08-24 13:33:58 -07:00
MCTargetDesc
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
TargetInfo
…
Utils
[AMDGPU] Make BVH isel consistent with other MIMG opcodes
2021-08-17 10:42:22 +09:00
AMDGPU.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPU.td
[AMDGPU] Enable ds_min/ds_max on more subtargets
2021-08-31 13:22:31 -04:00
AMDGPUAliasAnalysis.cpp
[NFC][AA] Prepare to convert AliasResult to class with PartialAlias offset.
2021-04-09 12:54:22 +03:00
AMDGPUAliasAnalysis.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUAlwaysInlinePass.cpp
[AMDGPU] Disable forceful inline of non-kernel functions which use LDS.
2021-04-15 09:12:56 +05:30
AMDGPUAnnotateKernelFeatures.cpp
AMDGPU: Stop inferring use of llvm.amdgcn.kernarg.segment.ptr
2021-08-26 20:30:03 -04:00
AMDGPUAnnotateUniformValues.cpp
[OpaquePtr] Clean up some uses of Type::getPointerElementType()
2021-05-31 09:54:57 -07:00
AMDGPUArgumentUsageInfo.cpp
[GlobalISel] NFC: Change LLT::vector to take ElementCount.
2021-06-24 11:26:12 +01:00
AMDGPUArgumentUsageInfo.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
AMDGPUAsmPrinter.cpp
[AMDGPU] Improve register computation for indirect calls
2021-07-20 13:48:50 +02:00
AMDGPUAsmPrinter.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUAtomicOptimizer.cpp
[AMDGPU] Use reductions instead of scans in the atomic optimizer
2021-03-26 15:38:14 +00:00
AMDGPUAttributor.cpp
AMDGPU: Invert AMDGPUAttributor
2021-08-26 21:32:13 -04:00
AMDGPUCallingConv.td
AMDGPU: Promote signext/zeroext i16 shader returns
2021-07-13 11:04:51 -04:00
AMDGPUCallLowering.cpp
AMDGPU/GlobalISel: Preserve more memory types
2021-07-16 08:57:26 -04:00
AMDGPUCallLowering.h
AMDGPU/GlobalISel: Redo kernel argument load handling
2021-07-16 08:56:54 -04:00
AMDGPUCodeGenPrepare.cpp
[AMDGPU] [CodeGen] Fold negate llvm.amdgcn.class into test mask
2021-06-18 13:04:12 -06:00
AMDGPUCombine.td
[GlobalISel] Add combine for PTR_ADD with regbanks
2021-08-17 13:58:16 +02:00
AMDGPUCtorDtorLowering.cpp
[AMDGPU] Handle functions in llvm's global ctors and dtors list
2021-08-06 15:53:33 +05:30
AMDGPUExportClustering.cpp
…
AMDGPUExportClustering.h
[llvm] Add missing header guards (NFC)
2021-01-30 09:53:42 -08:00
AMDGPUFeatures.td
AMDGPU: Remove FeatureLocalMemorySize0
2021-09-02 22:43:01 -04:00
AMDGPUFixFunctionBitcasts.cpp
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
…
AMDGPUGISel.td
[AMDGPU][GlobalISel] Add G_AMDGPU_FFBL_B32
2021-08-06 09:40:48 +01:00
AMDGPUGlobalISelUtils.cpp
…
AMDGPUGlobalISelUtils.h
[ADT] Move DenseMapInfo for ArrayRef/StringRef into respective headers (NFC)
2021-06-03 18:34:36 +02:00
AMDGPUHSAMetadataStreamer.cpp
[AMDGPU] Handle functions in llvm's global ctors and dtors list
2021-08-06 15:53:33 +05:30
AMDGPUHSAMetadataStreamer.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUInstCombineIntrinsic.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUInstrInfo.cpp
…
AMDGPUInstrInfo.h
…
AMDGPUInstrInfo.td
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUInstructions.td
[AMDGPU] Simplify tablegen files. NFC.
2021-07-07 09:19:23 +01:00
AMDGPUInstructionSelector.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUInstructionSelector.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUISelDAGToDAG.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUISelLowering.cpp
[amdgpu] Revise the conversion from i64 to f32.
2021-08-06 17:01:47 -04:00
AMDGPUISelLowering.h
[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX
2021-06-28 09:06:44 -04:00
AMDGPULateCodeGenPrepare.cpp
[OpaquePtr] Remove uses of CreateConstGEP1_64() without element type
2021-07-17 16:43:20 +02:00
AMDGPULegalizerInfo.cpp
[AMDGPU] Enable ds_min/ds_max on more subtargets
2021-08-31 13:22:31 -04:00
AMDGPULegalizerInfo.h
[AMDGPU][GlobalISel] Better legalization of 32-bit ctlz/cttz
2021-08-06 09:40:48 +01:00
AMDGPULibCalls.cpp
[llvm] Rename StringRef _lower() method calls to _insensitive()
2021-06-25 00:22:01 +03:00
AMDGPULibFunc.cpp
[NFC] Cleanup more AttributeList::addAttribute()
2021-08-17 21:05:41 -07:00
AMDGPULibFunc.h
…
AMDGPULowerIntrinsics.cpp
…
AMDGPULowerKernelArguments.cpp
[NFC] More get/removeAttribute() cleanup
2021-08-17 21:05:41 -07:00
AMDGPULowerKernelAttributes.cpp
[AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC.
2021-07-06 15:03:31 -07:00
AMDGPULowerModuleLDSPass.cpp
AMDGPU: Fix crashing on kernel declarations when lowering LDS
2021-08-26 19:01:10 -04:00
AMDGPUMachineCFGStructurizer.cpp
[AMDGPU] Fix build breakage
2021-02-14 09:02:55 -08:00
AMDGPUMachineFunction.cpp
[AMDGPU] Fix module LDS selection
2021-05-20 15:59:01 -07:00
AMDGPUMachineFunction.h
[amdgpu] Implement lower function LDS pass
2021-03-15 15:24:01 +00:00
AMDGPUMachineModuleInfo.cpp
…
AMDGPUMachineModuleInfo.h
…
AMDGPUMacroFusion.cpp
…
AMDGPUMacroFusion.h
[llvm] Add missing header guards (NFC)
2021-01-30 09:53:42 -08:00
AMDGPUMCInstLower.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUMIRFormatter.cpp
…
AMDGPUMIRFormatter.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp
…
AMDGPUPerfHintAnalysis.cpp
[AMDGPU] Tune perfhint analysis to account access width
2021-07-21 12:46:10 -07:00
AMDGPUPerfHintAnalysis.h
[AMDGPU] Tune perfhint analysis to account access width
2021-07-21 12:46:10 -07:00
AMDGPUPostLegalizerCombiner.cpp
AMDGPU/GlobalISel: Remove redundant G_FCANONICALIZE
2021-04-27 12:26:37 +02:00
AMDGPUPreLegalizerCombiner.cpp
[GISel] Support llvm.memcpy.inline
2021-06-30 12:39:05 -07:00
AMDGPUPrintfRuntimeBinding.cpp
[llvm] Remove redundant calls to str() and c_str() (NFC)
2021-08-30 09:05:05 -07:00
AMDGPUPromoteAlloca.cpp
[NFC] Remove redundant code added in 04ce2de3
2021-09-01 11:30:07 -07:00
AMDGPUPropagateAttributes.cpp
Revert "[AMDGPU] [IndirectCalls] Don't propagate attributes to address taken functions and their callees"
2021-06-24 02:33:50 +01:00
AMDGPUPTNote.h
AMDGPU: Add target id and code object v4 support
2021-03-24 11:54:05 -04:00
AMDGPURegBankCombiner.cpp
AMDGPU/GlobalISel: Add integer med3 combines
2021-04-27 11:52:23 +02:00
AMDGPURegisterBankInfo.cpp
[AMDGPU] Try to fix a GCC 11 warning
2021-08-23 10:51:37 +01:00
AMDGPURegisterBankInfo.h
[AMDGPU][GlobalISel] Legalize and select G_SBFX and G_UBFX
2021-06-28 09:06:44 -04:00
AMDGPURegisterBanks.td
[AMDGPU] Add 224-bit vector types and link 192-bit types to MVTs
2021-06-24 12:41:22 +09:00
AMDGPUReplaceLDSUseWithPointer.cpp
[AMDGPU] Split entry basic block after alloca instructions.
2021-09-01 10:18:44 +05:30
AMDGPUResourceUsageAnalysis.cpp
[AMDGPU] Improve register computation for indirect calls
2021-07-20 13:48:50 +02:00
AMDGPUResourceUsageAnalysis.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPURewriteOutArguments.cpp
[NFC] Migrate some callers away from Function/AttributeLists methods that take an index
2021-08-17 21:05:40 -07:00
AMDGPUSearchableTables.td
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
AMDGPUSubtarget.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUSubtarget.h
[AMDGPU] Stop mulhi from doing 24 bit mul for uniform values
2021-07-05 10:33:23 +01:00
AMDGPUTargetMachine.cpp
Revert "Revert "Disable ReplaceLDS pass, patch up tests to match""
2021-09-01 21:52:50 +05:30
AMDGPUTargetMachine.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUTargetObjectFile.cpp
…
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUTargetTransformInfo.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDGPUUnifyDivergentExitNodes.cpp
[AMDGPU] Don't handle export done when unify exit nodes
2021-07-14 14:54:37 +08:00
AMDGPUUnifyMetadata.cpp
…
AMDILCFGStructurizer.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
AMDKernelCodeT.h
…
BUFInstructions.td
[AMDGPU] Fix atomic float max/min intrinsics
2021-08-18 14:12:42 -04:00
CaymanInstructions.td
…
CMakeLists.txt
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
DSInstructions.td
[AMDGPU] Enable ds_min/ds_max on more subtargets
2021-08-31 13:22:31 -04:00
EvergreenInstructions.td
[AMDGPU] Inline FSHRPattern into its only use. NFC.
2021-03-26 09:32:02 +00:00
EXPInstructions.td
…
FLATInstructions.td
[AMDGPU] Support global_atomic_fmin/max on gfx10
2021-08-25 09:35:10 -04:00
GCNDPPCombine.cpp
[AMDGPU] GCNDPPCombine: don't shrink V_ADD_CO_U32 if carry out is used
2021-04-20 09:17:52 +01:00
GCNHazardRecognizer.cpp
[AMDGPU] Set wait state for meta instructions to zero
2021-08-18 01:46:59 -04:00
GCNHazardRecognizer.h
[AMDGPU] Limit runs of fixLdsBranchVmemWARHazard
2021-06-14 22:30:23 +02:00
GCNILPSched.cpp
…
GCNIterativeScheduler.cpp
…
GCNIterativeScheduler.h
…
GCNMinRegStrategy.cpp
…
GCNNSAReassign.cpp
…
GCNPreRAOptimizations.cpp
[AMDGPU] Add S_MOV_B64_IMM_PSEUDO for wide constants
2021-06-30 11:45:38 -07:00
GCNProcessors.td
[AMDGPU] Add gfx1035 target
2021-06-24 14:32:41 -04:00
GCNRegPressure.cpp
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
GCNRegPressure.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
GCNSchedStrategy.cpp
[AMDGPU] Avoid second rescheduling for some regions
2021-02-26 12:29:37 -08:00
GCNSchedStrategy.h
[AMDGPU] Avoid second rescheduling for some regions
2021-02-26 12:29:37 -08:00
GCNSubtarget.h
[AMDGPU] Enable ds_min/ds_max on more subtargets
2021-08-31 13:22:31 -04:00
InstCombineTables.td
…
MIMGInstructions.td
[AMDGPU] Make BVH isel consistent with other MIMG opcodes
2021-08-17 10:42:22 +09:00
R600.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600.td
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600AsmPrinter.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600AsmPrinter.h
…
R600ClauseMergePass.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600ControlFlowFinalizer.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600ExpandSpecialInstrs.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600FrameLowering.cpp
…
R600FrameLowering.h
…
R600InstrFormats.td
…
R600InstrInfo.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600InstrInfo.h
…
R600InstrInfo.td
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Instructions.td
[AMDGPU] Remove dead and broken ComplexPatterns
2021-08-26 12:48:32 +01:00
R600ISelLowering.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600ISelLowering.h
Change TargetLowering::canMergeStoresTo() to take a MF instead of DAG.
2021-08-06 12:57:53 -07:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600MachineScheduler.h
…
R600OpenCLImageTypeLoweringPass.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600OptimizeVectorRegisters.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Packetizer.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Processors.td
AMDGPU: Remove FeatureLocalMemorySize0
2021-09-02 22:43:01 -04:00
R600RegisterInfo.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600Subtarget.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600TargetMachine.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600TargetMachine.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600TargetTransformInfo.cpp
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R600TargetTransformInfo.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
[AMDGPU] Set LoopInfo as preserved by SIAnnotateControlFlow
2021-07-08 09:34:43 -07:00
SIDefines.h
[AMDGPU] Introduce RC flags for vector register classes
2021-09-01 02:55:45 -04:00
SIFixSGPRCopies.cpp
[AMDGPU] Divergence-driven compare operations instruction selection
2021-08-25 18:30:49 +03:00
SIFixVGPRCopies.cpp
…
SIFoldOperands.cpp
[AMDGPU] Fix too many constants with flat scratch
2021-08-20 08:21:36 +02:00
SIFormMemoryClauses.cpp
[AMDGPU][NFC] Fix typos in SIFormMemoryClauses description
2021-05-06 07:47:39 -07:00
SIFrameLowering.cpp
[AMDGPU] Avoid assert for saved FP
2021-08-25 09:50:59 -07:00
SIFrameLowering.h
…
SIInsertHardClauses.cpp
[AMDGPU] Do not clause NSA instructions
2021-05-14 12:54:56 +09:00
SIInsertWaitcnts.cpp
[AMDGPU] Remove assert
2021-05-12 14:52:37 +02:00
SIInstrFormats.td
[AMDGPU] IsFlatScratch/Global -> FlatScratch/Global
2021-04-09 11:20:31 +02:00
SIInstrInfo.cpp
[AMDGPU] Process any power of 2 in optimizeCompareInstr
2021-09-02 17:39:17 -07:00
SIInstrInfo.h
[AMDGPU] Fold immediates in the optimizeCompareInstr
2021-09-02 17:23:26 -07:00
SIInstrInfo.td
[AMDGPU] Divergence-driven compare operations instruction selection
2021-08-25 18:30:49 +03:00
SIInstructions.td
[AMDGPU] enable scalar compare in truncate selection
2021-09-01 23:35:11 +03:00
SIISelLowering.cpp
[AMDGPU] Enable ds_min/ds_max on more subtargets
2021-08-31 13:22:31 -04:00
SIISelLowering.h
Change TargetLowering::canMergeStoresTo() to take a MF instead of DAG.
2021-08-06 12:57:53 -07:00
SILateBranchLowering.cpp
[AMDGPU] Allow frontends to disable null export for pixel shaders
2021-07-22 10:20:46 +09:00
SILoadStoreOptimizer.cpp
[AMDGPU] Add merging into S_BUFFER_LOAD_DWORDX8_IMM
2021-09-02 16:26:25 +02:00
SILowerControlFlow.cpp
[AMDGPU] Mark waterfall loops as SI_WATERFALL_LOOP
2021-07-13 12:15:08 +02:00
SILowerI1Copies.cpp
AMDGPU: Treat IMPLICIT_DEF like a constant lanemask source
2021-07-27 11:44:38 -04:00
SILowerSGPRSpills.cpp
RegAlloc: Allow targets to split register allocation
2021-07-13 18:49:29 -04:00
SIMachineFunctionInfo.cpp
AMDGPU: Stop inferring use of llvm.amdgcn.kernarg.segment.ptr
2021-08-26 20:30:03 -04:00
SIMachineFunctionInfo.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
SIMachineScheduler.cpp
…
SIMachineScheduler.h
[NFC][AMDGPU] Reduce includes dependencies.
2021-08-25 12:01:55 +03:00
SIMemoryLegalizer.cpp
[AMDGPU] Support non-strictly stronger memory orderings in SIMemoryLegalizer
2021-08-10 08:43:03 +00:00
SIModeRegister.cpp
…
SIOptimizeExecMasking.cpp
[AMDGPU] Move kill lowering to WQM pass and add live mask tracking
2021-02-11 20:31:29 +09:00
SIOptimizeExecMaskingPreRA.cpp
[AMDGPU] SIOptimizeExecMaskingPreRA should check constant bus constraint when folds EXEC copy
2021-03-24 14:14:13 +03:00
SIOptimizeVGPRLiveRange.cpp
[AMDGPU] Improve killed check for vgpr optimization
2021-07-21 15:24:59 +02:00
SIPeepholeSDWA.cpp
…
SIPostRABundler.cpp
AMDGPU: Use kill instruction to hint soft clause live ranges
2021-02-26 18:26:40 -05:00
SIPreAllocateWWMRegs.cpp
[AMDGPU] Save WWM registers in functions
2021-04-23 18:09:24 +02:00
SIPreEmitPeephole.cpp
[AMDGPU] Remove set_gpr_idx instructions in conditional blocks
2021-04-30 22:15:45 +01:00
SIProgramInfo.cpp
…
SIProgramInfo.h
[AMDGPU] gfx90a support
2021-02-17 16:01:32 -08:00
SIRegisterInfo.cpp
[AMDGPU] Introduce RC flags for vector register classes
2021-09-01 02:55:45 -04:00
SIRegisterInfo.h
[AMDGPU] Introduce RC flags for vector register classes
2021-09-01 02:55:45 -04:00
SIRegisterInfo.td
[AMDGPU] Introduce RC flags for vector register classes
2021-09-01 02:55:45 -04:00
SISchedule.td
[MCA] Adding an AMDGPUCustomBehaviour implementation.
2021-08-24 13:33:58 -07:00
SIShrinkInstructions.cpp
[AMDGPU] Add VReg_192/VReg_224 support for MIMG instructions
2021-07-22 10:42:15 +09:00
SIWholeQuadMode.cpp
[AMDGPU] Fix WQM failure with single block inactive demote
2021-05-06 21:02:26 +09:00
SMInstructions.td
[AMDGPU] Set IsAtomicRet and IsAtomicNoRet on Real instructions
2021-06-16 12:23:29 +01:00
SOPInstructions.td
[AMDGPU][MC] Added missing isCall/isBranch flags
2021-07-16 14:59:10 +03:00
VIInstrFormats.td
…
VOP1Instructions.td
[AMDGPU] Mark all relevant VOP1 instructions rematerializable
2021-07-21 14:05:32 -07:00
VOP2Instructions.td
[AMDGPU] Legalize operands of V_ADDC_U32_e32 and friends
2021-08-03 09:04:52 +01:00
VOP3Instructions.td
[AMDGPU] Mark relevant rematerializable VOP3 instructions
2021-07-21 14:44:13 -07:00
VOP3PInstructions.td
[AMDGPU] Set VOP3P flag on Real instructions
2021-06-16 15:00:45 +01:00
VOPCInstructions.td
[AMDGPU] Set SALU, VALU and other instruction type flags on Real instructions
2021-06-16 13:36:02 +01:00
VOPInstructions.td
[AMDGPU] Set SALU, VALU and other instruction type flags on Real instructions
2021-06-16 13:36:02 +01:00