039b469b85
This does the same as D96259, but for ARM, just like AArch64, using the same comment char as for ELF and MinGW mode. As the assembly input/output of LLVM is GAS style, trying to match what MS armasm.exe does isn't needed (because the comment char used is the least concern when it comes to that; all directives differ too). If a separate armasm compatible mode is implemented, it can use its own comment style (just like llvm-ml implements MS ml.exe compatible assembly parsing). This fixes building compiler-rt assembly files for ARM in MSVC mode. The updated testcase literals-comments.s was only intended to make sure that '#' isn't interpreted as a comment char. Differential Revision: https://reviews.llvm.org/D107251
121 lines
3.4 KiB
C++
121 lines
3.4 KiB
C++
//===-- ARMMCAsmInfo.cpp - ARM asm properties -----------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declarations of the ARMMCAsmInfo properties.
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//
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//===----------------------------------------------------------------------===//
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#include "ARMMCAsmInfo.h"
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#include "llvm/ADT/Triple.h"
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using namespace llvm;
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void ARMMCAsmInfoDarwin::anchor() { }
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ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin(const Triple &TheTriple) {
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if ((TheTriple.getArch() == Triple::armeb) ||
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(TheTriple.getArch() == Triple::thumbeb))
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IsLittleEndian = false;
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Data64bitsDirective = nullptr;
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CommentString = "@";
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Code16Directive = ".code\t16";
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Code32Directive = ".code\t32";
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UseDataRegionDirectives = true;
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SupportsDebugInformation = true;
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// Conditional Thumb 4-byte instructions can have an implicit IT.
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MaxInstLength = 6;
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// Exceptions handling
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ExceptionsType = (TheTriple.isOSDarwin() && !TheTriple.isWatchABI())
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? ExceptionHandling::SjLj
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: ExceptionHandling::DwarfCFI;
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}
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void ARMELFMCAsmInfo::anchor() { }
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ARMELFMCAsmInfo::ARMELFMCAsmInfo(const Triple &TheTriple) {
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if ((TheTriple.getArch() == Triple::armeb) ||
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(TheTriple.getArch() == Triple::thumbeb))
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IsLittleEndian = false;
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// ".comm align is in bytes but .align is pow-2."
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AlignmentIsInBytes = false;
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Data64bitsDirective = nullptr;
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CommentString = "@";
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Code16Directive = ".code\t16";
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Code32Directive = ".code\t32";
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SupportsDebugInformation = true;
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// Conditional Thumb 4-byte instructions can have an implicit IT.
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MaxInstLength = 6;
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// Exceptions handling
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switch (TheTriple.getOS()) {
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case Triple::NetBSD:
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ExceptionsType = ExceptionHandling::DwarfCFI;
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break;
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default:
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ExceptionsType = ExceptionHandling::ARM;
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break;
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}
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// foo(plt) instead of foo@plt
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UseParensForSymbolVariant = true;
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}
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void ARMELFMCAsmInfo::setUseIntegratedAssembler(bool Value) {
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UseIntegratedAssembler = Value;
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if (!UseIntegratedAssembler) {
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// gas doesn't handle VFP register names in cfi directives,
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// so don't use register names with external assembler.
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// See https://sourceware.org/bugzilla/show_bug.cgi?id=16694
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DwarfRegNumForCFI = true;
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}
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}
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void ARMCOFFMCAsmInfoMicrosoft::anchor() { }
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ARMCOFFMCAsmInfoMicrosoft::ARMCOFFMCAsmInfoMicrosoft() {
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AlignmentIsInBytes = false;
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SupportsDebugInformation = true;
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ExceptionsType = ExceptionHandling::WinEH;
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PrivateGlobalPrefix = "$M";
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PrivateLabelPrefix = "$M";
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CommentString = "@";
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// Conditional Thumb 4-byte instructions can have an implicit IT.
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MaxInstLength = 6;
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}
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void ARMCOFFMCAsmInfoGNU::anchor() { }
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ARMCOFFMCAsmInfoGNU::ARMCOFFMCAsmInfoGNU() {
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AlignmentIsInBytes = false;
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HasSingleParameterDotFile = true;
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CommentString = "@";
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Code16Directive = ".code\t16";
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Code32Directive = ".code\t32";
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PrivateGlobalPrefix = ".L";
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PrivateLabelPrefix = ".L";
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SupportsDebugInformation = true;
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ExceptionsType = ExceptionHandling::DwarfCFI;
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UseParensForSymbolVariant = true;
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DwarfRegNumForCFI = false;
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// Conditional Thumb 4-byte instructions can have an implicit IT.
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MaxInstLength = 6;
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}
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