97470897c4
Currently the instruction paddi always takes s34imm as the type for the 34 bit immediate. However, the PC Relative form of the instruction should not produce the same fixup as the non PC Relative form. This patch splits the s34imm type into s34imm and s34imm_pcrel so that two different fixups can be emitted. Reviewed By: nemanjai, #powerpc, kamaub Differential Revision: https://reviews.llvm.org/D83255
62 lines
1.8 KiB
C++
62 lines
1.8 KiB
C++
//===-- PPCFixupKinds.h - PPC Specific Fixup Entries ------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCFIXUPKINDS_H
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#define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCFIXUPKINDS_H
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#include "llvm/MC/MCFixup.h"
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#undef PPC
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namespace llvm {
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namespace PPC {
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enum Fixups {
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// 24-bit PC relative relocation for direct branches like 'b' and 'bl'.
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fixup_ppc_br24 = FirstTargetFixupKind,
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// 24-bit PC relative relocation for direct branches like 'b' and 'bl' where
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// the caller does not use the TOC.
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fixup_ppc_br24_notoc,
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/// 14-bit PC relative relocation for conditional branches.
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fixup_ppc_brcond14,
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/// 24-bit absolute relocation for direct branches like 'ba' and 'bla'.
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fixup_ppc_br24abs,
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/// 14-bit absolute relocation for conditional branches.
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fixup_ppc_brcond14abs,
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/// A 16-bit fixup corresponding to lo16(_foo) or ha16(_foo) for instrs like
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/// 'li' or 'addis'.
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fixup_ppc_half16,
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/// A 14-bit fixup corresponding to lo16(_foo) with implied 2 zero bits for
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/// instrs like 'std'.
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fixup_ppc_half16ds,
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// A 34-bit fixup corresponding to PC-relative paddi.
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fixup_ppc_pcrel34,
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// A 34-bit fixup corresponding to Non-PC-relative paddi.
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fixup_ppc_imm34,
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/// Not a true fixup, but ties a symbol to a call to __tls_get_addr for the
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/// TLS general and local dynamic models, or inserts the thread-pointer
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/// register number.
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fixup_ppc_nofixup,
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// Marker
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LastTargetFixupKind,
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NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
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};
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}
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}
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#endif
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