b3b993a7ad
This reverts the revert commit 408c4408fa.
This version of the patch includes a fix for a crash caused by
treating ICmp/FCmp constant expressions as instructions.
Original message:
On some targets, like AArch64, vector selects can be efficiently lowered
if the vector condition is a compare with a supported predicate.
This patch adds a new argument to getCmpSelInstrCost, to indicate the
predicate of the feeding select condition. Note that it is not
sufficient to use the context instruction when querying the cost of a
vector select starting from a scalar one, because the condition of the
vector select could be composed of compares with different predicates.
This change greatly improves modeling the costs of certain
compare/select patterns on AArch64.
I am also planning on putting up patches to make use of the new argument in
SLPVectorizer & LV.
154 lines
5.9 KiB
LLVM
154 lines
5.9 KiB
LLVM
; RUN: opt < %s -mtriple=aarch64--linux-gnu -cost-model -analyze | FileCheck %s --check-prefix=COST
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; RUN: llc < %s -mtriple=aarch64--linux-gnu | FileCheck %s --check-prefix=CODE
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; COST-LABEL: v8i8_select_eq
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp eq <8 x i8> %a, %b
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <8 x i1> %cmp.1, <8 x i8> %a, <8 x i8> %c
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; CODE-LABEL: v8i8_select_eq
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; CODE: bb.0
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; CODE-NEXT: cmeq v{{.+}}.8b, v{{.+}}.8b, v{{.+}}.8b
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; CODE-NEXT: bif v{{.+}}.8b, v{{.+}}.8b, v{{.+}}.8b
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; CODE-NEXT: ret
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define <8 x i8> @v8i8_select_eq(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) {
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%cmp.1 = icmp eq <8 x i8> %a, %b
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%s.1 = select <8 x i1> %cmp.1, <8 x i8> %a, <8 x i8> %c
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ret <8 x i8> %s.1
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}
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; COST-LABEL: v16i8_select_sgt
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp sgt <16 x i8> %a, %b
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <16 x i1> %cmp.1, <16 x i8> %a, <16 x i8> %c
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; CODE-LABEL: v16i8_select_sgt
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; CODE: bb.0
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; CODE-NEXT: cmgt v{{.+}}.16b, v{{.+}}.16b, v{{.+}}.16b
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; CODE-NEXT: bif v{{.+}}.16b, v{{.+}}.16b, v{{.+}}.16b
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; CODE-NEXT: ret
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define <16 x i8> @v16i8_select_sgt(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
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%cmp.1 = icmp sgt <16 x i8> %a, %b
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%s.1 = select <16 x i1> %cmp.1, <16 x i8> %a, <16 x i8> %c
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ret <16 x i8> %s.1
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}
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; COST-LABEL: v4i16_select_ne
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp ne <4 x i16> %a, %b
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <4 x i1> %cmp.1, <4 x i16> %a, <4 x i16> %c
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; CODE-LABEL: v4i16_select_ne
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; CODE: bb.0
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; CODE-NEXT: cmeq v{{.+}}.4h, v{{.+}}.4h, v{{.+}}.4h
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; CODE-NEXT: bit v{{.+}}.8b, v{{.+}}.8b, v{{.+}}.8b
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; CODE-NEXT: ret
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define <4 x i16> @v4i16_select_ne(<4 x i16> %a, <4 x i16> %b, <4 x i16> %c) {
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%cmp.1 = icmp ne <4 x i16> %a, %b
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%s.1 = select <4 x i1> %cmp.1, <4 x i16> %a, <4 x i16> %c
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ret <4 x i16> %s.1
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}
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; COST-LABEL: v8i16_select_ugt
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp ugt <8 x i16> %a, %b
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <8 x i1> %cmp.1, <8 x i16> %a, <8 x i16> %c
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; CODE-LABEL: v8i16_select_ugt
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; CODE: bb.0
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; CODE-NEXT: cmhi v{{.+}}.8h, v{{.+}}.8h, v{{.+}}.8h
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; CODE-NEXT: bif v{{.+}}.16b, v{{.+}}.16b, v{{.+}}.16b
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; CODE-NEXT: ret
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define <8 x i16> @v8i16_select_ugt(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
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%cmp.1 = icmp ugt <8 x i16> %a, %b
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%s.1 = select <8 x i1> %cmp.1, <8 x i16> %a, <8 x i16> %c
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ret <8 x i16> %s.1
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}
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; COST-LABEL: v2i32_select_ule
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp ule <2 x i32> %a, %b
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <2 x i1> %cmp.1, <2 x i32> %a, <2 x i32> %c
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; CODE-LABEL: v2i32_select_ule
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; CODE: bb.0
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; CODE-NEXT: cmhs v{{.+}}.2s, v{{.+}}.2s, v{{.+}}.2s
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; CODE-NEXT: bif v{{.+}}.8b, v{{.+}}.8b, v{{.+}}.8b
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; CODE-NEXT: ret
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define <2 x i32> @v2i32_select_ule(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
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%cmp.1 = icmp ule <2 x i32> %a, %b
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%s.1 = select <2 x i1> %cmp.1, <2 x i32> %a, <2 x i32> %c
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ret <2 x i32> %s.1
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}
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; COST-LABEL: v4i32_select_ult
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp ult <4 x i32> %a, %b
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <4 x i1> %cmp.1, <4 x i32> %a, <4 x i32> %c
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; CODE-LABEL: v4i32_select_ult
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; CODE: bb.0
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; CODE-NEXT: cmhi v{{.+}}.4s, v{{.+}}.4s, v{{.+}}.4s
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; CODE-NEXT: bif v{{.+}}.16b, v{{.+}}.16b, v{{.+}}.16b
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; CODE-NEXT: ret
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define <4 x i32> @v4i32_select_ult(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
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%cmp.1 = icmp ult <4 x i32> %a, %b
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%s.1 = select <4 x i1> %cmp.1, <4 x i32> %a, <4 x i32> %c
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ret <4 x i32> %s.1
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}
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; COST-LABEL: v2i64_select_sle
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %cmp.1 = icmp sle <2 x i64> %a, %b
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; COST-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s.1 = select <2 x i1> %cmp.1, <2 x i64> %a, <2 x i64> %c
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; CODE-LABEL: v2i64_select_sle
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; CODE: bb.0
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; CODE-NEXT: cmge v{{.+}}.2d, v{{.+}}.2d, v{{.+}}.2d
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; CODE-NEXT: bif v{{.+}}.16b, v{{.+}}.16b, v{{.+}}.16b
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; CODE-NEXT: ret
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define <2 x i64> @v2i64_select_sle(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
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%cmp.1 = icmp sle <2 x i64> %a, %b
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%s.1 = select <2 x i1> %cmp.1, <2 x i64> %a, <2 x i64> %c
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ret <2 x i64> %s.1
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}
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; COST-LABEL: v3i64_select_sle
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; COST-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %cmp.1 = icmp sle <3 x i64> %a, %b
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; COST-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %s.1 = select <3 x i1> %cmp.1, <3 x i64> %a, <3 x i64> %c
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; CODE-LABEL: v3i64_select_sle
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; CODE: bb.0
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; CODE: ldr
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; CODE: mov
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; CODE: mov
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; CODE: mov
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; CODE: cmge
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; CODE: cmge
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; CODE: bif
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; CODE: ext
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; CODE: bif
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; CODE: ret
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define <3 x i64> @v3i64_select_sle(<3 x i64> %a, <3 x i64> %b, <3 x i64> %c) {
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%cmp.1 = icmp sle <3 x i64> %a, %b
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%s.1 = select <3 x i1> %cmp.1, <3 x i64> %a, <3 x i64> %c
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ret <3 x i64> %s.1
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}
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; COST-LABEL: v2i64_select_no_cmp
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; COST-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %s.1 = select <2 x i1> %cond, <2 x i64> %a, <2 x i64> %b
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; CODE-LABEL: v2i64_select_no_cmp
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; CODE: bb.0
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; CODE-NEXT: ushll v{{.+}}.2d, v{{.+}}.2s, #0
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; CODE-NEXT: shl v{{.+}}.2d, v{{.+}}.2d, #63
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; CODE-NEXT: sshr v{{.+}}.2d, v{{.+}}.2d, #63
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; CODE-NEXT: bif v{{.+}}.16b, v{{.+}}.16b, v{{.+}}.16b
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; CODE-NEXT: ret
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define <2 x i64> @v2i64_select_no_cmp(<2 x i64> %a, <2 x i64> %b, <2 x i1> %cond) {
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%s.1 = select <2 x i1> %cond, <2 x i64> %a, <2 x i64> %b
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ret <2 x i64> %s.1
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}
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