819c1651f7
The recently announced IBM z15 processor implements the architecture already supported as "arch13" in LLVM. This patch adds support for "z15" as an alternate architecture name for arch13. The patch also uses z15 in a number of places where we used arch13 as long as the official name was not yet announced. llvm-svn: 372435
98 lines
4.3 KiB
LLVM
98 lines
4.3 KiB
LLVM
; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=z13 \
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; RUN: | FileCheck %s -check-prefixes=CHECK,Z13
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; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=z15 \
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; RUN: | FileCheck %s -check-prefixes=CHECK,Z15
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define void @fun0(i32 %a) {
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; CHECK-LABEL: Printing analysis 'Cost Model Analysis' for function 'fun0':
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c0 = xor i32 %l0, -1
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res0 = or i32 %a, %c0
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res0 = or i32 %a, %c0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c1 = xor i32 %l1, -1
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res1 = and i32 %a, %c1
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res1 = and i32 %a, %c1
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c2 = and i32 %l2, %a
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res2 = xor i32 %c2, -1
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res2 = xor i32 %c2, -1
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c3 = or i32 %l3, %a
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res3 = xor i32 %c3, -1
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res3 = xor i32 %c3, -1
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c4 = xor i32 %l4, %a
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res4 = xor i32 %c4, -1
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res4 = xor i32 %c4, -1
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entry:
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%l0 = load i32, i32* undef
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%c0 = xor i32 %l0, -1
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%res0 = or i32 %a, %c0
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store i32 %res0, i32* undef
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%l1 = load i32, i32* undef
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%c1 = xor i32 %l1, -1
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%res1 = and i32 %a, %c1
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store i32 %res1, i32* undef
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%l2 = load i32, i32* undef
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%c2 = and i32 %l2, %a
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%res2 = xor i32 %c2, -1
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store i32 %res2, i32* undef
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%l3 = load i32, i32* undef
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%c3 = or i32 %l3, %a
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%res3 = xor i32 %c3, -1
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store i32 %res3, i32* undef
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%l4 = load i32, i32* undef
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%c4 = xor i32 %l4, %a
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%res4 = xor i32 %c4, -1
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store i32 %res4, i32* undef
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ret void
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}
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define void @fun1(i64 %a) {
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; CHECK-LABEL: Printing analysis 'Cost Model Analysis' for function 'fun1':
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c0 = xor i64 %l0, -1
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res0 = or i64 %a, %c0
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res0 = or i64 %a, %c0
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c1 = xor i64 %l1, -1
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res1 = and i64 %a, %c1
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res1 = and i64 %a, %c1
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c2 = and i64 %l2, %a
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res2 = xor i64 %c2, -1
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res2 = xor i64 %c2, -1
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c3 = or i64 %l3, %a
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res3 = xor i64 %c3, -1
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res3 = xor i64 %c3, -1
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c4 = xor i64 %l4, %a
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; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res4 = xor i64 %c4, -1
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; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res4 = xor i64 %c4, -1
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entry:
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%l0 = load i64, i64* undef
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%c0 = xor i64 %l0, -1
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%res0 = or i64 %a, %c0
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store i64 %res0, i64* undef
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%l1 = load i64, i64* undef
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%c1 = xor i64 %l1, -1
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%res1 = and i64 %a, %c1
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store i64 %res1, i64* undef
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%l2 = load i64, i64* undef
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%c2 = and i64 %l2, %a
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%res2 = xor i64 %c2, -1
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store i64 %res2, i64* undef
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%l3 = load i64, i64* undef
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%c3 = or i64 %l3, %a
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%res3 = xor i64 %c3, -1
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store i64 %res3, i64* undef
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%l4 = load i64, i64* undef
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%c4 = xor i64 %l4, %a
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%res4 = xor i64 %c4, -1
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store i64 %res4, i64* undef
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ret void
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}
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