401a45c61b
D106408 enables rematerialization of instructions with virtual register uses. That has uncovered the bug in the allUsesAvailableAt implementation: https://bugs.llvm.org/show_bug.cgi?id=51516. In the majority of cases canRematerializeAt() called to check if an instruction can be rematerialized before the given UseIdx. However, SplitEditor::enterIntvAtEnd() calls it to rematerialize an instruction at the end of a block passing LIS.getMBBEndIdx() into the check. In the testcase from the bug it has attempted to rematerialize ADDXri after STRXui in bb.17. The use operand %55 of the ADD is killed by the STRX but that is undetected by the check because it adjusts passed UseIdx to the reg slot, before the kill. The value is dead at the index passed to the check however. This change uses a later of passed UseIdx and its reg slot. This shall be correct because if are checking an availability of operands before an instruction that instruction cannot be the one defining these operands. If we are checking for late rematerialization we are really interested if operands live past the instruction. The bug is not exploitable without D106408 but needed to reland reverted D106408. Differential Revision: https://reviews.llvm.org/D108475
115 lines
6.5 KiB
YAML
115 lines
6.5 KiB
YAML
# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs -start-before=machine-scheduler -stop-after=virtregrewriter,1 -o - %s | FileCheck -check-prefix=GCN %s
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# Check that %3 was not rematerialized before the last store since its operand %1
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# is killed by that store.
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# GCN-LABEL: name: global_sextload_v32i32_to_v32i64
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# GCN: renamable $vgpr0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
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# GCN: GLOBAL_STORE_DWORDX4_SADDR killed renamable $vgpr27, killed renamable $vgpr19_vgpr20_vgpr21_vgpr22, killed renamable $sgpr0_sgpr1, 16, 0, implicit $exec, implicit killed renamable $vgpr0
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---
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name: global_sextload_v32i32_to_v32i64
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tracksRegLiveness: true
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machineFunctionInfo:
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scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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stackPtrOffsetReg: '$sgpr32'
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body: |
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bb.0:
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liveins: $sgpr4_sgpr5
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%0:sgpr_64(p4) = COPY $sgpr4_sgpr5
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%1:vgpr_32 = COPY $m0
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%2:sgpr_128 = S_LOAD_DWORDX4_IMM %0(p4), 0, 0
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%3:vgpr_32 = V_MOV_B32_e32 %1, implicit $exec
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%4:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %2.sub2_sub3, %3, 112, 0, implicit $exec :: (load (s128))
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%5:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %2.sub2_sub3, %3, 96, 0, implicit $exec, implicit %1 :: (load (s128))
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%6:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %2.sub2_sub3, %3, 80, 0, implicit $exec :: (load (s128))
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%7:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %2.sub2_sub3, %3, 64, 0, implicit $exec :: (load (s128))
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%8:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %2.sub2_sub3, %3, 48, 0, implicit $exec :: (load (s128))
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%9:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %2.sub2_sub3, %3, 32, 0, implicit $exec :: (load (s128))
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%10:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %2.sub2_sub3, %3, 16, 0, implicit $exec :: (load (s128))
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%11:vreg_128 = GLOBAL_LOAD_DWORDX4_SADDR %2.sub2_sub3, %3, 0, 0, implicit $exec :: (load (s128))
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undef %12.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %11.sub3, implicit $exec
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%12.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %11.sub2, implicit $exec
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undef %13.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %11.sub1, implicit $exec
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%13.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %11.sub0, implicit $exec
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undef %14.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %10.sub3, implicit $exec
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%14.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %10.sub2, implicit $exec
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undef %15.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %10.sub1, implicit $exec
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%15.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %10.sub0, implicit $exec
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undef %16.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %9.sub3, implicit $exec
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%16.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %9.sub2, implicit $exec
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undef %17.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %9.sub1, implicit $exec
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%17.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %9.sub0, implicit $exec
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undef %18.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %8.sub3, implicit $exec
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%18.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %8.sub2, implicit $exec
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undef %19.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %8.sub1, implicit $exec
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%19.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %8.sub0, implicit $exec
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undef %20.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %7.sub3, implicit $exec
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%20.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %7.sub2, implicit $exec
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undef %21.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %7.sub1, implicit $exec
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%21.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %7.sub0, implicit $exec
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undef %22.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %6.sub3, implicit $exec
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%22.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %6.sub2, implicit $exec
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undef %23.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %6.sub1, implicit $exec
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%23.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %6.sub0, implicit $exec
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undef %24.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %5.sub3, implicit $exec
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%24.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %5.sub2, implicit $exec
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undef %25.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %5.sub1, implicit $exec
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%25.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %5.sub0, implicit $exec
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undef %26.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %4.sub3, implicit $exec
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%26.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %4.sub2, implicit $exec
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undef %27.sub3:vreg_128 = V_ASHRREV_I32_e32 31, %4.sub1, implicit $exec
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%27.sub1:vreg_128 = V_ASHRREV_I32_e32 31, %4.sub0, implicit $exec
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%27.sub0:vreg_128 = COPY %4.sub0
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%27.sub2:vreg_128 = COPY %4.sub1
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GLOBAL_STORE_DWORDX4_SADDR %3, %27, %2.sub0_sub1, 224, 0, implicit $exec
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%26.sub0:vreg_128 = COPY %4.sub2
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%26.sub2:vreg_128 = COPY %4.sub3
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GLOBAL_STORE_DWORDX4_SADDR %3, %26, %2.sub0_sub1, 240, 0, implicit $exec
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%25.sub0:vreg_128 = COPY %5.sub0
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%25.sub2:vreg_128 = COPY %5.sub1
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GLOBAL_STORE_DWORDX4_SADDR %3, %25, %2.sub0_sub1, 192, 0, implicit $exec
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%24.sub0:vreg_128 = COPY %5.sub2
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%24.sub2:vreg_128 = COPY %5.sub3
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GLOBAL_STORE_DWORDX4_SADDR %3, %24, %2.sub0_sub1, 208, 0, implicit $exec
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%23.sub0:vreg_128 = COPY %6.sub0
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%23.sub2:vreg_128 = COPY %6.sub1
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GLOBAL_STORE_DWORDX4_SADDR %3, %23, %2.sub0_sub1, 160, 0, implicit $exec
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%22.sub0:vreg_128 = COPY %6.sub2
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%22.sub2:vreg_128 = COPY %6.sub3
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GLOBAL_STORE_DWORDX4_SADDR %3, %22, %2.sub0_sub1, 176, 0, implicit $exec
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%21.sub0:vreg_128 = COPY %7.sub0
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%21.sub2:vreg_128 = COPY %7.sub1
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GLOBAL_STORE_DWORDX4_SADDR %3, %21, %2.sub0_sub1, 128, 0, implicit $exec
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%20.sub0:vreg_128 = COPY %7.sub2
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%20.sub2:vreg_128 = COPY %7.sub3
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GLOBAL_STORE_DWORDX4_SADDR %3, %20, %2.sub0_sub1, 144, 0, implicit $exec
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%19.sub0:vreg_128 = COPY %8.sub0
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%19.sub2:vreg_128 = COPY %8.sub1
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GLOBAL_STORE_DWORDX4_SADDR %3, %19, %2.sub0_sub1, 96, 0, implicit $exec
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%18.sub0:vreg_128 = COPY %8.sub2
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%18.sub2:vreg_128 = COPY %8.sub3
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GLOBAL_STORE_DWORDX4_SADDR %3, %18, %2.sub0_sub1, 112, 0, implicit $exec
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%17.sub0:vreg_128 = COPY %9.sub0
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%17.sub2:vreg_128 = COPY %9.sub1
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GLOBAL_STORE_DWORDX4_SADDR %3, %17, %2.sub0_sub1, 64, 0, implicit $exec
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%16.sub0:vreg_128 = COPY %9.sub2
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%16.sub2:vreg_128 = COPY %9.sub3
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GLOBAL_STORE_DWORDX4_SADDR %3, %16, %2.sub0_sub1, 80, 0, implicit $exec
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%15.sub0:vreg_128 = COPY %10.sub0
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%15.sub2:vreg_128 = COPY %10.sub1
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GLOBAL_STORE_DWORDX4_SADDR %3, %15, %2.sub0_sub1, 32, 0, implicit $exec
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%14.sub0:vreg_128 = COPY %10.sub2
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%14.sub2:vreg_128 = COPY %10.sub3
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GLOBAL_STORE_DWORDX4_SADDR %3, %14, %2.sub0_sub1, 48, 0, implicit $exec
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%13.sub0:vreg_128 = COPY %11.sub0
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%13.sub2:vreg_128 = COPY %11.sub1
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GLOBAL_STORE_DWORDX4_SADDR %3, %13, %2.sub0_sub1, 0, 0, implicit $exec
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%12.sub0:vreg_128 = COPY %11.sub2
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%12.sub2:vreg_128 = COPY %11.sub3
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GLOBAL_STORE_DWORDX4_SADDR %3, %12, %2.sub0_sub1, 16, 0, implicit $exec, implicit killed %1
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S_ENDPGM 0
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...
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