Currently isReallyTriviallyReMaterializableGeneric() implementation prevents rematerialization on any virtual register use on the grounds that is not a trivial rematerialization and that we do not want to extend liveranges. It appears that LRE logic does not attempt to extend a liverange of a source register for rematerialization so that is not an issue. That is checked in the LiveRangeEdit::allUsesAvailableAt(). The only non-trivial aspect of it is accounting for tied-defs which normally represent a read-modify-write operation and not rematerializable. The test for a tied-def situation already exists in the /CodeGen/AMDGPU/remat-vop.mir, test_no_remat_v_cvt_f32_i32_sdwa_dst_unused_preserve. The change has affected ARM/Thumb, Mips, RISCV, and x86. For the targets where I more or less understand the asm it seems to reduce spilling (as expected) or be neutral. However, it needs a review by all targets' specialists. Differential Revision: https://reviews.llvm.org/D106408
576 lines
19 KiB
YAML
576 lines
19 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs --stress-regalloc=2 -start-before=greedy -stop-after=virtregrewriter -o - %s | FileCheck -check-prefix=GCN %s
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---
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name: test_remat_s_mov_b32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_mov_b32
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; GCN: renamable $sgpr0 = S_MOV_B32 1
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; GCN: renamable $sgpr1 = S_MOV_B32 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_MOV_B32 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_MOV_B32 1
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%1:sreg_32 = S_MOV_B32 2
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%2:sreg_32 = S_MOV_B32 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_no_remat_s_mov_b32_impuse_exec
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tracksRegLiveness: true
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machineFunctionInfo:
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stackPtrOffsetReg: $sgpr32
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body: |
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bb.0:
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; GCN-LABEL: name: test_no_remat_s_mov_b32_impuse_exec
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; GCN: $exec = IMPLICIT_DEF
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; GCN: renamable $sgpr0 = S_MOV_B32 1, implicit $exec
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; GCN: SI_SPILL_S32_SAVE killed renamable $sgpr0, %stack.1, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.1, addrspace 5)
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; GCN: renamable $sgpr1 = S_MOV_B32 2, implicit $exec
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; GCN: renamable $sgpr0 = S_MOV_B32 3, implicit $exec
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; GCN: SI_SPILL_S32_SAVE killed renamable $sgpr0, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.0, addrspace 5)
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; GCN: renamable $sgpr0 = SI_SPILL_S32_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.1, addrspace 5)
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = SI_SPILL_S32_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.0, addrspace 5)
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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$exec = IMPLICIT_DEF
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%0:sreg_32 = S_MOV_B32 1, implicit $exec
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%1:sreg_32 = S_MOV_B32 2, implicit $exec
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%2:sreg_32 = S_MOV_B32 3, implicit $exec
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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# The liverange of %0 covers a point of rematerialization, source value is
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# availabe.
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---
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name: test_remat_s_mov_b32_vreg_src_long_lr
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tracksRegLiveness: true
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machineFunctionInfo:
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stackPtrOffsetReg: $sgpr32
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_mov_b32_vreg_src_long_lr
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; GCN: renamable $sgpr0 = IMPLICIT_DEF
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; GCN: renamable $sgpr1 = S_MOV_B32 renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr1 = S_MOV_B32 renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr1 = S_MOV_B32 renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = IMPLICIT_DEF
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%1:sreg_32 = S_MOV_B32 %0:sreg_32
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%2:sreg_32 = S_MOV_B32 %0:sreg_32
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%3:sreg_32 = S_MOV_B32 %0:sreg_32
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_NOP 0, implicit %3
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S_NOP 0, implicit %0
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S_ENDPGM 0
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...
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# The liverange of %0 does not cover a point of rematerialization, source value is
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# unavailabe and we do not want to artificially extend the liverange.
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---
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name: test_no_remat_s_mov_b32_vreg_src_short_lr
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tracksRegLiveness: true
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machineFunctionInfo:
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stackPtrOffsetReg: $sgpr32
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body: |
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bb.0:
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; GCN-LABEL: name: test_no_remat_s_mov_b32_vreg_src_short_lr
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; GCN: renamable $sgpr0 = IMPLICIT_DEF
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; GCN: renamable $sgpr1 = S_MOV_B32 renamable $sgpr0
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; GCN: SI_SPILL_S32_SAVE killed renamable $sgpr1, %stack.1, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.1, addrspace 5)
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; GCN: renamable $sgpr1 = S_MOV_B32 renamable $sgpr0
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; GCN: SI_SPILL_S32_SAVE killed renamable $sgpr1, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.0, addrspace 5)
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; GCN: renamable $sgpr0 = S_MOV_B32 killed renamable $sgpr0
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; GCN: renamable $sgpr1 = SI_SPILL_S32_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.1, addrspace 5)
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr1 = SI_SPILL_S32_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.0, addrspace 5)
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = IMPLICIT_DEF
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%1:sreg_32 = S_MOV_B32 %0:sreg_32
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%2:sreg_32 = S_MOV_B32 %0:sreg_32
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%3:sreg_32 = S_MOV_B32 %0:sreg_32
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_NOP 0, implicit %3
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S_ENDPGM 0
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...
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---
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name: test_remat_s_mov_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_mov_b64
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; GCN: renamable $sgpr0_sgpr1 = S_MOV_B64 1
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; GCN: renamable $sgpr2_sgpr3 = S_MOV_B64 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0_sgpr1
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; GCN: S_NOP 0, implicit killed renamable $sgpr2_sgpr3
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; GCN: renamable $sgpr0_sgpr1 = S_MOV_B64 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0_sgpr1
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; GCN: S_ENDPGM 0
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%0:sgpr_64 = S_MOV_B64 1
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%1:sgpr_64 = S_MOV_B64 2
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%2:sgpr_64 = S_MOV_B64 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_brev_b32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_brev_b32
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; GCN: renamable $sgpr0 = S_BREV_B32 1
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; GCN: renamable $sgpr1 = S_BREV_B32 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_BREV_B32 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_BREV_B32 1
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%1:sreg_32 = S_BREV_B32 2
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%2:sreg_32 = S_BREV_B32 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_brev_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_brev_b64
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; GCN: renamable $sgpr0_sgpr1 = S_BREV_B64 1
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; GCN: renamable $sgpr2_sgpr3 = S_BREV_B64 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0_sgpr1
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; GCN: S_NOP 0, implicit killed renamable $sgpr2_sgpr3
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; GCN: renamable $sgpr0_sgpr1 = S_BREV_B64 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0_sgpr1
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; GCN: S_ENDPGM 0
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%0:sgpr_64 = S_BREV_B64 1
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%1:sgpr_64 = S_BREV_B64 2
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%2:sgpr_64 = S_BREV_B64 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_ff0_i32_b32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_ff0_i32_b32
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; GCN: renamable $sgpr0 = S_FF0_I32_B32 1
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; GCN: renamable $sgpr1 = S_FF0_I32_B32 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_FF0_I32_B32 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_FF0_I32_B32 1
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%1:sreg_32 = S_FF0_I32_B32 2
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%2:sreg_32 = S_FF0_I32_B32 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_ff1_i32_b32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_ff1_i32_b32
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; GCN: renamable $sgpr0 = S_FF1_I32_B32 1
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; GCN: renamable $sgpr1 = S_FF1_I32_B32 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_FF1_I32_B32 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_FF1_I32_B32 1
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%1:sreg_32 = S_FF1_I32_B32 2
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%2:sreg_32 = S_FF1_I32_B32 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_ff0_i32_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_ff0_i32_b64
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; GCN: renamable $sgpr0 = S_FF0_I32_B64 1
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; GCN: renamable $sgpr1 = S_FF0_I32_B64 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_FF0_I32_B64 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_FF0_I32_B64 1
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%1:sreg_32 = S_FF0_I32_B64 2
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%2:sreg_32 = S_FF0_I32_B64 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_ff1_i32_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_ff1_i32_b64
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; GCN: renamable $sgpr0 = S_FF1_I32_B64 1
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; GCN: renamable $sgpr1 = S_FF1_I32_B64 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_FF1_I32_B64 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_FF1_I32_B64 1
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%1:sreg_32 = S_FF1_I32_B64 2
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%2:sreg_32 = S_FF1_I32_B64 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_flbit_i32_b32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_flbit_i32_b32
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; GCN: renamable $sgpr0 = S_FLBIT_I32_B32 1
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; GCN: renamable $sgpr1 = S_FLBIT_I32_B32 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_FLBIT_I32_B32 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_FLBIT_I32_B32 1
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%1:sreg_32 = S_FLBIT_I32_B32 2
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%2:sreg_32 = S_FLBIT_I32_B32 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_flbit_i32_b64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_flbit_i32_b64
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; GCN: renamable $sgpr0 = S_FLBIT_I32_B64 1
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; GCN: renamable $sgpr1 = S_FLBIT_I32_B64 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_FLBIT_I32_B64 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_FLBIT_I32_B64 1
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%1:sreg_32 = S_FLBIT_I32_B64 2
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%2:sreg_32 = S_FLBIT_I32_B64 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_flbit_i32
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_flbit_i32
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; GCN: renamable $sgpr0 = S_FLBIT_I32 1
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; GCN: renamable $sgpr1 = S_FLBIT_I32 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_FLBIT_I32 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_FLBIT_I32 1
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%1:sreg_32 = S_FLBIT_I32 2
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%2:sreg_32 = S_FLBIT_I32 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_flbit_i32_i64
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_flbit_i32_i64
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; GCN: renamable $sgpr0 = S_FLBIT_I32_I64 1
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; GCN: renamable $sgpr1 = S_FLBIT_I32_I64 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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; GCN: renamable $sgpr0 = S_FLBIT_I32_I64 3
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_ENDPGM 0
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%0:sreg_32 = S_FLBIT_I32_I64 1
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%1:sreg_32 = S_FLBIT_I32_I64 2
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%2:sreg_32 = S_FLBIT_I32_I64 3
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S_NOP 0, implicit %0
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S_NOP 0, implicit %1
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S_NOP 0, implicit %2
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S_ENDPGM 0
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...
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---
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name: test_remat_s_sext_i32_i8
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: test_remat_s_sext_i32_i8
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; GCN: renamable $sgpr0 = S_SEXT_I32_I8 1
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; GCN: renamable $sgpr1 = S_SEXT_I32_I8 2
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; GCN: S_NOP 0, implicit killed renamable $sgpr0
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; GCN: S_NOP 0, implicit killed renamable $sgpr1
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|
; GCN: renamable $sgpr0 = S_SEXT_I32_I8 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_ENDPGM 0
|
|
%0:sreg_32 = S_SEXT_I32_I8 1
|
|
%1:sreg_32 = S_SEXT_I32_I8 2
|
|
%2:sreg_32 = S_SEXT_I32_I8 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_sext_i32_i16
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_sext_i32_i16
|
|
; GCN: renamable $sgpr0 = S_SEXT_I32_I16 1
|
|
; GCN: renamable $sgpr1 = S_SEXT_I32_I16 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr1
|
|
; GCN: renamable $sgpr0 = S_SEXT_I32_I16 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_ENDPGM 0
|
|
%0:sreg_32 = S_SEXT_I32_I16 1
|
|
%1:sreg_32 = S_SEXT_I32_I16 2
|
|
%2:sreg_32 = S_SEXT_I32_I16 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_bitreplicate_b64_b32
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_bitreplicate_b64_b32
|
|
; GCN: renamable $sgpr0_sgpr1 = S_BITREPLICATE_B64_B32 1
|
|
; GCN: renamable $sgpr2_sgpr3 = S_BITREPLICATE_B64_B32 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0_sgpr1
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr2_sgpr3
|
|
; GCN: renamable $sgpr0_sgpr1 = S_BITREPLICATE_B64_B32 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0_sgpr1
|
|
; GCN: S_ENDPGM 0
|
|
%0:sgpr_64 = S_BITREPLICATE_B64_B32 1
|
|
%1:sgpr_64 = S_BITREPLICATE_B64_B32 2
|
|
%2:sgpr_64 = S_BITREPLICATE_B64_B32 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_bfm_b32
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_bfm_b32
|
|
; GCN: renamable $sgpr0 = S_BFM_B32 1, 1
|
|
; GCN: renamable $sgpr1 = S_BFM_B32 2, 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr1
|
|
; GCN: renamable $sgpr0 = S_BFM_B32 3, 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_ENDPGM 0
|
|
%0:sreg_32 = S_BFM_B32 1, 1
|
|
%1:sreg_32 = S_BFM_B32 2, 2
|
|
%2:sreg_32 = S_BFM_B32 3, 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_bfm_b64
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_bfm_b64
|
|
; GCN: renamable $sgpr0_sgpr1 = S_BFM_B64 1, 1
|
|
; GCN: renamable $sgpr2_sgpr3 = S_BFM_B64 2, 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0_sgpr1
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr2_sgpr3
|
|
; GCN: renamable $sgpr0_sgpr1 = S_BFM_B64 3, 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0_sgpr1
|
|
; GCN: S_ENDPGM 0
|
|
%0:sgpr_64 = S_BFM_B64 1, 1
|
|
%1:sgpr_64 = S_BFM_B64 2, 2
|
|
%2:sgpr_64 = S_BFM_B64 3, 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_mul_i32
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_mul_i32
|
|
; GCN: renamable $sgpr0 = S_MUL_I32 1, 1
|
|
; GCN: renamable $sgpr1 = S_MUL_I32 2, 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr1
|
|
; GCN: renamable $sgpr0 = S_MUL_I32 3, 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_ENDPGM 0
|
|
%0:sreg_32 = S_MUL_I32 1, 1
|
|
%1:sreg_32 = S_MUL_I32 2, 2
|
|
%2:sreg_32 = S_MUL_I32 3, 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_mul_hi_i32
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_mul_hi_i32
|
|
; GCN: renamable $sgpr0 = S_MUL_HI_I32 1, 1
|
|
; GCN: renamable $sgpr1 = S_MUL_HI_I32 2, 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr1
|
|
; GCN: renamable $sgpr0 = S_MUL_HI_I32 3, 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_ENDPGM 0
|
|
%0:sreg_32 = S_MUL_HI_I32 1, 1
|
|
%1:sreg_32 = S_MUL_HI_I32 2, 2
|
|
%2:sreg_32 = S_MUL_HI_I32 3, 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_mul_hi_u32
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_mul_hi_u32
|
|
; GCN: renamable $sgpr0 = S_MUL_HI_U32 1, 1
|
|
; GCN: renamable $sgpr1 = S_MUL_HI_U32 2, 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr1
|
|
; GCN: renamable $sgpr0 = S_MUL_HI_U32 3, 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_ENDPGM 0
|
|
%0:sreg_32 = S_MUL_HI_U32 1, 1
|
|
%1:sreg_32 = S_MUL_HI_U32 2, 2
|
|
%2:sreg_32 = S_MUL_HI_U32 3, 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_pack_ll_b32_b16
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_pack_ll_b32_b16
|
|
; GCN: renamable $sgpr0 = S_PACK_LL_B32_B16 1, 1
|
|
; GCN: renamable $sgpr1 = S_PACK_LL_B32_B16 2, 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr1
|
|
; GCN: renamable $sgpr0 = S_PACK_LL_B32_B16 3, 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_ENDPGM 0
|
|
%0:sreg_32 = S_PACK_LL_B32_B16 1, 1
|
|
%1:sreg_32 = S_PACK_LL_B32_B16 2, 2
|
|
%2:sreg_32 = S_PACK_LL_B32_B16 3, 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_pack_lh_b32_b16
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_pack_lh_b32_b16
|
|
; GCN: renamable $sgpr0 = S_PACK_LH_B32_B16 1, 1
|
|
; GCN: renamable $sgpr1 = S_PACK_LH_B32_B16 2, 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr1
|
|
; GCN: renamable $sgpr0 = S_PACK_LH_B32_B16 3, 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_ENDPGM 0
|
|
%0:sreg_32 = S_PACK_LH_B32_B16 1, 1
|
|
%1:sreg_32 = S_PACK_LH_B32_B16 2, 2
|
|
%2:sreg_32 = S_PACK_LH_B32_B16 3, 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|
|
---
|
|
name: test_remat_s_pack_hh_b32_b16
|
|
tracksRegLiveness: true
|
|
body: |
|
|
bb.0:
|
|
; GCN-LABEL: name: test_remat_s_pack_hh_b32_b16
|
|
; GCN: renamable $sgpr0 = S_PACK_HH_B32_B16 1, 1
|
|
; GCN: renamable $sgpr1 = S_PACK_HH_B32_B16 2, 2
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr1
|
|
; GCN: renamable $sgpr0 = S_PACK_HH_B32_B16 3, 3
|
|
; GCN: S_NOP 0, implicit killed renamable $sgpr0
|
|
; GCN: S_ENDPGM 0
|
|
%0:sreg_32 = S_PACK_HH_B32_B16 1, 1
|
|
%1:sreg_32 = S_PACK_HH_B32_B16 2, 2
|
|
%2:sreg_32 = S_PACK_HH_B32_B16 3, 3
|
|
S_NOP 0, implicit %0
|
|
S_NOP 0, implicit %1
|
|
S_NOP 0, implicit %2
|
|
S_ENDPGM 0
|
|
...
|