1420f4efbe
Summary: On XMEGA, I/O address space is same as data address space - there is no 0x20 offset, because CPU General Purpose Registers are not mapped in data address space. From https://en.wikipedia.org/wiki/AVR_microcontrollers > In the XMEGA variant, the working register file is not mapped into the data address space; as such, it is not possible to treat any of the XMEGA's working registers as though they were SRAM. Instead, the I/O registers are mapped into the data address space starting at the very beginning of the address space. Reviewers: dylanmckay Reviewed By: dylanmckay Subscribers: hiraditya, Jim, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D77207 Patch by Vlastimil Labsky.
49 lines
1.8 KiB
LLVM
49 lines
1.8 KiB
LLVM
; RUN: llc -O0 < %s -march=avr -mcpu avrxmega1 | FileCheck %s -check-prefix=XMEGA
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; RUN: llc -O0 < %s -march=avr -mcpu avrxmega2 | FileCheck %s -check-prefix=XMEGA
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; RUN: llc -O0 < %s -march=avr -mcpu avrxmega3 | FileCheck %s -check-prefix=XMEGA
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; RUN: llc -O0 < %s -march=avr -mcpu avrxmega4 | FileCheck %s -check-prefix=XMEGA
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; RUN: llc -O0 < %s -march=avr -mcpu avrxmega5 | FileCheck %s -check-prefix=XMEGA
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; RUN: llc -O0 < %s -march=avr -mcpu avrxmega6 | FileCheck %s -check-prefix=XMEGA
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; RUN: llc -O0 < %s -march=avr -mcpu avrxmega7 | FileCheck %s -check-prefix=XMEGA
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; RUN: llc -O0 < %s -march=avr -mcpu avr2 | FileCheck %s -check-prefix=AVR
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; RUN: llc -O0 < %s -march=avr -mcpu avr25 | FileCheck %s -check-prefix=AVR
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; RUN: llc -O0 < %s -march=avr -mcpu avr3 | FileCheck %s -check-prefix=AVR
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; RUN: llc -O0 < %s -march=avr -mcpu avr31 | FileCheck %s -check-prefix=AVR
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; RUN: llc -O0 < %s -march=avr -mcpu avr35 | FileCheck %s -check-prefix=AVR
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; RUN: llc -O0 < %s -march=avr -mcpu avr4 | FileCheck %s -check-prefix=AVR
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; RUN: llc -O0 < %s -march=avr -mcpu avr5 | FileCheck %s -check-prefix=AVR
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; RUN: llc -O0 < %s -march=avr -mcpu avr51 | FileCheck %s -check-prefix=AVR
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; RUN: llc -O0 < %s -march=avr -mcpu avr6 | FileCheck %s -check-prefix=AVR
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define i8 @read8_low_io() {
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; CHECK-LABEL: read8_low_io
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; XMEGA: in r24, 8
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; AVR: lds r24, 8
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%1 = load i8, i8* inttoptr (i16 8 to i8*)
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ret i8 %1
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}
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define i8 @read8_hi_io() {
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; CHECK-LABEL: read8_hi_io
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; XMEGA: in r24, 40
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; AVR: in r24, 8
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%1 = load i8, i8* inttoptr (i16 40 to i8*)
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ret i8 %1
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}
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define i8 @read8_maybe_io() {
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; CHECK-LABEL: read8_maybe_io
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; XMEGA: lds r24, 80
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; AVR: in r24, 48
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%1 = load i8, i8* inttoptr (i16 80 to i8*)
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ret i8 %1
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}
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define i8 @read8_not_io(){
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; CHECK-LABEL: read8_not_io
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; XMEGA: lds r24, 160
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; AVR: lds r24, 160
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%1 = load i8, i8* inttoptr (i16 160 to i8*)
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ret i8 %1
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}
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