Files
clang-p2996/llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.ll
Xiang1 Zhang 39584ae5b5 [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595
2020-12-16 22:17:25 -08:00

30 lines
901 B
LLVM

; RUN: llc -debugify-check-and-strip-all-safe -o - %s 2>&1 | FileCheck %s
; ModuleID = 'main.c'
source_filename = "main.c"
@ga = dso_local global i32 2, align 4
define dso_local i32 @foo(i32 %a, i32 %b) {
entry:
%a.addr = alloca i32, align 4
%b.addr = alloca i32, align 4
%c = alloca i32, align 4
store i32 %a, i32* %a.addr, align 4
store i32 %b, i32* %b.addr, align 4
%0 = load i32, i32* %a.addr, align 4
%1 = load i32, i32* %b.addr, align 4
%add = add nsw i32 %0, %1
store i32 %add, i32* %c, align 4
%2 = load i32, i32* %c, align 4
%mul = mul nsw i32 %2, 2
store i32 %mul, i32* @ga, align 4
%3 = load i32, i32* %c, align 4
ret i32 %3
}
; Different Back-Ends may have different number of passes, here we only
; check two of them to make sure -debugify-check-and-strip-all-safe works.
;CHECK: Machine IR debug info check: PASS
;CHECK: Machine IR debug info check: PASS