4ce26deac2
We already have reassociation code for Adds and Ors separately in DAG combiner, this adds it for the combination of the two where Ors act like Adds. It reassociates (add (or (x, c), y) -> (add (add (x, y), c)) where we know that the Ors operands have no common bits set, and the Or has one use. Differential Revision: https://reviews.llvm.org/D104765
47 lines
1.5 KiB
LLVM
47 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; This should compile without errors, and the offsets with respect to the
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; beginning of the global "array" don't need to be multiples of 8.
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target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
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target triple = "hexagon"
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@array = external global [1000000 x i16], align 8
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define void @fred(i1 %x) #0 {
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; CHECK-LABEL: fred:
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; CHECK: // %bb.0: // %b0
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; CHECK-NEXT: {
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; CHECK-NEXT: p0 = tstbit(r0,#0)
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; CHECK-NEXT: if (!p0.new) r2 = #1024
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; CHECK-NEXT: if (p0.new) r2 = #0
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; CHECK-NEXT: r5:4 = combine(#0,#0)
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: memd(r2+##array+184) = r5:4
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; CHECK-NEXT: memd(r2+##array+176) = r5:4
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; CHECK-NEXT: }
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; CHECK-NEXT: {
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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b0:
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br i1 %x, label %b3, label %b1
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b1: ; preds = %b0
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%v2 = add i32 0, 512
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br label %b3
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b3: ; preds = %b1, %b0
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%v4 = phi i32 [ 0, %b0 ], [ %v2, %b1 ]
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%v5 = or i32 %v4, 1
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%v6 = add nsw i32 %v5, -1
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%v7 = getelementptr inbounds [1000000 x i16], [1000000 x i16]* @array, i32 0, i32 %v6
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%v8 = getelementptr i16, i16* %v7, i32 88
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%v9 = bitcast i16* %v8 to <8 x i16>*
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store <8 x i16> zeroinitializer, <8 x i16>* %v9, align 8
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ret void
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}
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attributes #0 = { norecurse nounwind }
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