Files
clang-p2996/llvm/test/CodeGen/M68k/CConv/c-args.ll
Min-Yih Hsu c23a780c30 [M68k][test](6/8) Add all of the tests
And a small utilities -- extract-section.py -- that helps extracting
specific object file section and printing in textual format. This
utility is just a workaround for tests inside `Encoding`. Hopefully in
the future we can replace dependencies in those tests with existing tools
(e.g. llvm-readobj). Please refer to this bug for more context:
https://bugs.llvm.org/show_bug.cgi?id=49245

Note that since we don't have AsmParser for now, we are testing the MC
part using MIR as input and put those tests under the `Encoding` folder.
In the future when AsmParser (and disassembler) is finished, those tests
will be moved to `test/MC/M68k`.

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88392
2021-03-08 12:30:57 -08:00

74 lines
1.8 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=m68k-pc-linux -relocation-model=pic -verify-machineinstrs | FileCheck %s
;
; C Call passes all arguments on stack ...
define void @test1(i32* nocapture %out, i32 %in) nounwind {
; CHECK-LABEL: test1:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l (4,%sp), %a0
; CHECK-NEXT: move.l (8,%sp), (%a0)
; CHECK-NEXT: rts
entry:
store i32 %in, i32* %out, align 4
ret void
}
define void @test2(i32* nocapture %pOut, i32* nocapture %pIn) nounwind {
; CHECK-LABEL: test2:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l (8,%sp), %a0
; CHECK-NEXT: move.l (4,%sp), %a1
; CHECK-NEXT: move.l (%a0), (%a1)
; CHECK-NEXT: rts
entry:
%0 = load i32, i32* %pIn, align 4
store i32 %0, i32* %pOut, align 4
ret void
}
define void @test3(i8* nocapture %out, i8 %in) nounwind {
; CHECK-LABEL: test3:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l (4,%sp), %a0
; CHECK-NEXT: move.b (11,%sp), (%a0)
; CHECK-NEXT: rts
entry:
store i8 %in, i8* %out, align 1
ret void
}
define void @test4(i16* nocapture %out, i16 %in) nounwind {
; CHECK-LABEL: test4:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.l (4,%sp), %a0
; CHECK-NEXT: move.w (10,%sp), (%a0)
; CHECK-NEXT: rts
entry:
store i16 %in, i16* %out, align 2
ret void
}
define i8 @test5(i8 %a, i8 %b) nounwind {
; CHECK-LABEL: test5:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.b (7,%sp), %d0
; CHECK-NEXT: add.b (11,%sp), %d0
; CHECK-NEXT: rts
entry:
%add = add i8 %a, %b
ret i8 %add
}
define i16 @test6(i16 %a, i16 %b) nounwind {
; CHECK-LABEL: test6:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: move.w (6,%sp), %d0
; CHECK-NEXT: add.w (10,%sp), %d0
; CHECK-NEXT: rts
entry:
%add = add i16 %a, %b
ret i16 %add
}