657bb7262d
Previously ADD & ADDA (as well as SUB & SUBA) instructions are mixed together, which not only violated Motorola assembly's syntax but also made asm parsing more difficult. This patch separates these two kinds of instructions migrate rest of the tests from test/CodeGen/M68k/Encoding/Arithmetic to test/MC/M68k/Arithmetic. Note that we observed minor regressions on codegen quality: Sometimes isel uses ADD instead of ADDA even the latter can lead to shorter sequence of code. This issue implies that some isel patterns might need to be updated.
68 lines
1.5 KiB
LLVM
68 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -O0 -mtriple=m68k-linux-gnu -verify-machineinstrs \
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; RUN: -code-model=small -relocation-model=pic \
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; RUN: | FileCheck %s
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define weak void @weak_foo() {
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; CHECK-LABEL: weak_foo:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0:
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; CHECK-NEXT: rts
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ret void
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}
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define weak_odr void @weak_odr_foo() {
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; CHECK-LABEL: weak_odr_foo:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0:
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; CHECK-NEXT: rts
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ret void
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}
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define internal void @internal_foo() {
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; CHECK-LABEL: internal_foo:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0:
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; CHECK-NEXT: rts
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ret void
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}
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declare i32 @ext_baz()
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define void @foo() {
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; CHECK-LABEL: foo:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0:
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; CHECK-NEXT: rts
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ret void
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}
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define void @bar() {
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; CHECK-LABEL: bar:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: suba.l #4, %sp
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; CHECK-NEXT: .cfi_def_cfa_offset -8
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; CHECK-NEXT: jsr (foo@PLT,%pc)
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; CHECK-NEXT: jsr (weak_odr_foo@PLT,%pc)
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; CHECK-NEXT: jsr (weak_foo@PLT,%pc)
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; CHECK-NEXT: jsr (internal_foo,%pc)
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; CHECK-NEXT: jsr (ext_baz@PLT,%pc)
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; CHECK-NEXT: adda.l #4, %sp
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; CHECK-NEXT: rts
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entry:
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call void @foo()
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call void @weak_odr_foo()
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call void @weak_foo()
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call void @internal_foo()
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call i32 @ext_baz()
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ret void
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}
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; -fpie for local global data tests should be added here
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!llvm.module.flags = !{!0, !1}
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!0 = !{i32 1, !"PIC Level", i32 1}
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!1 = !{i32 1, !"PIE Level", i32 1}
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