fae05692a3
This will currently accept the old number of bytes syntax, and convert it to a scalar. This should be removed in the near future (I think I converted all of the tests already, but likely missed a few). Not sure what the exact syntax and policy should be. We can continue printing the number of bytes for non-generic instructions to avoid test churn and only allow non-scalar types for generic instructions. This will currently print the LLT in parentheses, but accept parsing the existing integers and implicitly converting to scalar. The parentheses are a bit ugly, but the parser logic seems unable to deal without either parentheses or some keyword to indicate the start of a type.
82 lines
2.4 KiB
YAML
82 lines
2.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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--- |
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define void @ptr_arg_in_regs(i32* %p) {entry: ret void}
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define void @ptr_arg_on_stack(i32 %x1, i32 %x2, i32 %x3, i32 %x4, i32* %p) {entry: ret void}
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define void @ret_ptr(i8* %p) {entry: ret void}
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...
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---
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name: ptr_arg_in_regs
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0
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; MIPS32-LABEL: name: ptr_arg_in_regs
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; MIPS32: liveins: $a0
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load (s32) from %ir.p)
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; MIPS32: $v0 = COPY [[LW]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(p0) = COPY $a0
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%1:gprb(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.p)
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$v0 = COPY %1(s32)
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RetRA implicit $v0
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...
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---
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name: ptr_arg_on_stack
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
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body: |
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bb.1.entry:
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liveins: $a0, $a1, $a2, $a3
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; MIPS32-LABEL: name: ptr_arg_on_stack
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; MIPS32: liveins: $a0, $a1, $a2, $a3
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; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.0, 0
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; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load (p0) from %fixed-stack.0, align 8)
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; MIPS32: [[LW1:%[0-9]+]]:gpr32 = LW [[LW]], 0 :: (load (s32) from %ir.p)
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; MIPS32: $v0 = COPY [[LW1]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%2:gprb(s32) = COPY $a2
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%3:gprb(s32) = COPY $a3
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%5:gprb(p0) = G_FRAME_INDEX %fixed-stack.0
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%4:gprb(p0) = G_LOAD %5(p0) :: (load (p0) from %fixed-stack.0, align 8)
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%6:gprb(s32) = G_LOAD %4(p0) :: (load (s32) from %ir.p)
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$v0 = COPY %6(s32)
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RetRA implicit $v0
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...
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---
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name: ret_ptr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0
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; MIPS32-LABEL: name: ret_ptr
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; MIPS32: liveins: $a0
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: $v0 = COPY [[COPY]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(p0) = COPY $a0
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$v0 = COPY %0(p0)
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RetRA implicit $v0
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...
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