a08fc1361a
On PowerPC, VSRpRC represents the pairs of even and odd VSX register, and VRRC corresponds to higher 32 VSX registers. In some cases, extra copies are produced when handling incoming VRRC arguments with VSRpRC. This patch changes allocation order of VSRpRC to eliminate this kind of copy. Stack frame sizes may increase if allocating non-volatile registers, and some other vector copies happen. They need fix in future changes. Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D104855
104 lines
3.8 KiB
LLVM
104 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s \
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; RUN: --check-prefix=CHECK-BE
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; This test checks that LSR properly recognizes lxvp/stxvp as load/store
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; intrinsics to avoid generating x-form instructions instead of d-forms.
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declare <256 x i1> @llvm.ppc.vsx.lxvp(i8*)
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declare void @llvm.ppc.vsx.stxvp(<256 x i1>, i8*)
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define void @foo(i32 zeroext %n, <256 x i1>* %ptr, <256 x i1>* %ptr2) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmplwi r3, 0
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; CHECK-NEXT: beqlr cr0
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; CHECK-NEXT: # %bb.1: # %for.body.lr.ph
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; CHECK-NEXT: clrldi r6, r3, 32
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; CHECK-NEXT: addi r3, r4, 64
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; CHECK-NEXT: addi r4, r5, 64
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; CHECK-NEXT: mtctr r6
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_2: # %for.body
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; CHECK-NEXT: #
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; CHECK-NEXT: lxvp vsp34, -64(r3)
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; CHECK-NEXT: lxvp vsp36, -32(r3)
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; CHECK-NEXT: lxvp vsp32, 0(r3)
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; CHECK-NEXT: lxvp vsp38, 32(r3)
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; CHECK-NEXT: addi r3, r3, 1
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; CHECK-NEXT: stxvp vsp34, -64(r4)
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; CHECK-NEXT: stxvp vsp36, -32(r4)
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; CHECK-NEXT: stxvp vsp32, 0(r4)
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; CHECK-NEXT: stxvp vsp38, 32(r4)
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; CHECK-NEXT: addi r4, r4, 1
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; CHECK-NEXT: bdnz .LBB0_2
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; CHECK-NEXT: # %bb.3: # %for.cond.cleanup
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; CHECK-NEXT: blr
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;
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; CHECK-BE-LABEL: foo:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: cmplwi r3, 0
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; CHECK-BE-NEXT: beqlr cr0
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; CHECK-BE-NEXT: # %bb.1: # %for.body.lr.ph
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; CHECK-BE-NEXT: clrldi r6, r3, 32
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; CHECK-BE-NEXT: addi r3, r4, 64
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; CHECK-BE-NEXT: addi r4, r5, 64
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; CHECK-BE-NEXT: mtctr r6
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; CHECK-BE-NEXT: .p2align 4
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; CHECK-BE-NEXT: .LBB0_2: # %for.body
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; CHECK-BE-NEXT: #
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; CHECK-BE-NEXT: lxvp vsp34, -64(r3)
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; CHECK-BE-NEXT: lxvp vsp36, -32(r3)
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; CHECK-BE-NEXT: lxvp vsp32, 0(r3)
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; CHECK-BE-NEXT: lxvp vsp38, 32(r3)
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; CHECK-BE-NEXT: addi r3, r3, 1
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; CHECK-BE-NEXT: stxvp vsp34, -64(r4)
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; CHECK-BE-NEXT: stxvp vsp36, -32(r4)
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; CHECK-BE-NEXT: stxvp vsp32, 0(r4)
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; CHECK-BE-NEXT: stxvp vsp38, 32(r4)
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; CHECK-BE-NEXT: addi r4, r4, 1
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; CHECK-BE-NEXT: bdnz .LBB0_2
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; CHECK-BE-NEXT: # %bb.3: # %for.cond.cleanup
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; CHECK-BE-NEXT: blr
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entry:
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%cmp35.not = icmp eq i32 %n, 0
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br i1 %cmp35.not, label %for.cond.cleanup, label %for.body.lr.ph
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for.body.lr.ph:
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%0 = bitcast <256 x i1>* %ptr to i8*
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%1 = bitcast <256 x i1>* %ptr2 to i8*
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%wide.trip.count = zext i32 %n to i64
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br label %for.body
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for.cond.cleanup:
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ret void
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for.body:
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%indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
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%2 = getelementptr i8, i8* %0, i64 %indvars.iv
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%3 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %2)
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%add2 = add nuw nsw i64 %indvars.iv, 32
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%4 = getelementptr i8, i8* %0, i64 %add2
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%5 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %4)
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%add4 = add nuw nsw i64 %indvars.iv, 64
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%6 = getelementptr i8, i8* %0, i64 %add4
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%7 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %6)
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%add6 = add nuw nsw i64 %indvars.iv, 96
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%8 = getelementptr i8, i8* %0, i64 %add6
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%9 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %8)
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%10 = getelementptr i8, i8* %1, i64 %indvars.iv
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tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %3, i8* %10)
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%11 = getelementptr i8, i8* %1, i64 %add2
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tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %5, i8* %11)
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%12 = getelementptr i8, i8* %1, i64 %add4
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tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %7, i8* %12)
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%13 = getelementptr i8, i8* %1, i64 %add6
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tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %9, i8* %13)
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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