1c450c3d7e
Export `lq`, `stq`, `lqarx` and `stqcx.` in preparation for implementing 16-byte lock free atomic operations on AIX. Add a new register class `g8prc` for these instructions, since these instructions require even-odd register pair. Reviewed By: nemanjai, jsji, #powerpc Differential Revision: https://reviews.llvm.org/D103010
24 lines
554 B
YAML
24 lines
554 B
YAML
# RUN: llc -simplify-mir -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
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# RUN: %s -o - | FileCheck %s
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---
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name: foo
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alignment: 8
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x3, $x4, $x30, $x31
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; CHECK-LABEL: .foo
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; CHECK: lq 2, 128(4)
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; CHECK: lqarx 28, 30, 31
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; CHECK: stqcx. 28, 30, 31
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; CHECK: stq 2, 128(4)
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$g8p1 = LQ 128, $x4
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$g8p14 = LQARX $x30, $x31
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STQCX $g8p14, $x30, $x31, implicit-def $cr0
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STQ $g8p1, 128, $x4
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$x3 = COPY $x31
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BLR8 implicit $lr8, implicit undef $rm, implicit $x3
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...
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