b115c038d2
Lowering certain float vectors without legal vector types could cause a crash due to a bad interaction between passing floats via GPRs and argument splitting. Split vector floats appear just like scalar floats. Under certain situations we choose to pass these float arguments via GPRs and use an XLenVT location and set the 'BCvt' info to track how they must be converted back to floating-point values. However, later logic for handling split arguments may take over, in which case we lose the previous information and set the 'Indirect' info, thus incorrectly lowering to integer types. I don't believe that we would have come across the notion of split floating-point arguments before. This patch addresses the issue by updating the lowering so that split arguments are only passed indirectly when they are scalar integer types. This has some change to how we lower some larger illegal float vectors, as can be seen in 'fastcc-float.ll' where the vector is now passed partly in registers and partly on the stack. Reviewed By: luismarques Differential Revision: https://reviews.llvm.org/D102852
72 lines
2.3 KiB
LLVM
72 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+f,+d -verify-machineinstrs < %s \
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; RUN: | FileCheck %s
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define fastcc float @callee(<32 x float> %A) nounwind {
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; CHECK-LABEL: callee:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fmv.x.w a0, fa0
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; CHECK-NEXT: ret
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%B = extractelement <32 x float> %A, i32 0
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ret float %B
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}
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; With the fastcc, arguments will be passed by fa0-fa7 and ft0-ft11.
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; The rest will be pushed on the stack.
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define float @caller(<32 x float> %A) nounwind {
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; CHECK-LABEL: caller:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -64
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; CHECK-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
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; CHECK-NEXT: fmv.w.x fa0, a0
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; CHECK-NEXT: fmv.w.x fa1, a1
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; CHECK-NEXT: fmv.w.x fa2, a2
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; CHECK-NEXT: fmv.w.x fa3, a3
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; CHECK-NEXT: fmv.w.x fa4, a4
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; CHECK-NEXT: flw ft0, 64(sp)
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; CHECK-NEXT: flw ft1, 68(sp)
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; CHECK-NEXT: flw ft2, 72(sp)
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; CHECK-NEXT: flw ft3, 76(sp)
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; CHECK-NEXT: flw ft4, 80(sp)
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; CHECK-NEXT: flw ft5, 84(sp)
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; CHECK-NEXT: flw ft6, 88(sp)
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; CHECK-NEXT: flw ft7, 92(sp)
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; CHECK-NEXT: flw ft8, 96(sp)
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; CHECK-NEXT: flw ft9, 100(sp)
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; CHECK-NEXT: flw ft10, 104(sp)
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; CHECK-NEXT: flw ft11, 108(sp)
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; CHECK-NEXT: flw fs0, 112(sp)
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; CHECK-NEXT: flw fs1, 116(sp)
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; CHECK-NEXT: flw fs2, 120(sp)
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; CHECK-NEXT: flw fs3, 124(sp)
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; CHECK-NEXT: flw fs4, 128(sp)
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; CHECK-NEXT: flw fs5, 132(sp)
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; CHECK-NEXT: flw fs6, 136(sp)
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; CHECK-NEXT: flw fs7, 140(sp)
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; CHECK-NEXT: flw fs8, 144(sp)
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; CHECK-NEXT: flw fs9, 148(sp)
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; CHECK-NEXT: flw fs10, 152(sp)
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; CHECK-NEXT: flw fs11, 156(sp)
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; CHECK-NEXT: fmv.w.x fa5, a5
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; CHECK-NEXT: fmv.w.x fa6, a6
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; CHECK-NEXT: fmv.w.x fa7, a7
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; CHECK-NEXT: fsw fs11, 44(sp)
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; CHECK-NEXT: fsw fs10, 40(sp)
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; CHECK-NEXT: fsw fs9, 36(sp)
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; CHECK-NEXT: fsw fs8, 32(sp)
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; CHECK-NEXT: fsw fs7, 28(sp)
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; CHECK-NEXT: fsw fs6, 24(sp)
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; CHECK-NEXT: fsw fs5, 20(sp)
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; CHECK-NEXT: fsw fs4, 16(sp)
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; CHECK-NEXT: fsw fs3, 12(sp)
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; CHECK-NEXT: fsw fs2, 8(sp)
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; CHECK-NEXT: fsw fs1, 4(sp)
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; CHECK-NEXT: fsw fs0, 0(sp)
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; CHECK-NEXT: call callee@plt
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; CHECK-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 64
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; CHECK-NEXT: ret
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%C = call fastcc float @callee(<32 x float> %A)
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ret float %C
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}
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