e28b6a60bc
Regenerated using: ./llvm/utils/update_llc_test_checks.py -u llvm/test/CodeGen/RISCV/*.ll This has added comments to spill-related instructions and added @plt to some symbols. Differential Revision: https://reviews.llvm.org/D92841
46 lines
1.5 KiB
LLVM
46 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I
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; The stack size is 2048 and the SP adjustment will be split.
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define i32 @SplitSP() nounwind {
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; RV32I-LABEL: SplitSP:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: addi sp, sp, -2032
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; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: addi a0, sp, 16
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; RV32I-NEXT: call foo@plt
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; RV32I-NEXT: mv a0, zero
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 2032
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; RV32I-NEXT: ret
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entry:
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%xx = alloca [2028 x i8], align 1
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%0 = getelementptr inbounds [2028 x i8], [2028 x i8]* %xx, i32 0, i32 0
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%call = call i32 @foo(i8* nonnull %0)
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ret i32 0
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}
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; The stack size is 2032 and the SP adjustment will not be split.
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define i32 @NoSplitSP() nounwind {
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; RV32I-LABEL: NoSplitSP:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: addi sp, sp, -2032
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; RV32I-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
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; RV32I-NEXT: addi a0, sp, 4
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; RV32I-NEXT: call foo@plt
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; RV32I-NEXT: mv a0, zero
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; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
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; RV32I-NEXT: addi sp, sp, 2032
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; RV32I-NEXT: ret
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entry:
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%xx = alloca [2024 x i8], align 1
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%0 = getelementptr inbounds [2024 x i8], [2024 x i8]* %xx, i32 0, i32 0
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%call = call i32 @foo(i8* nonnull %0)
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ret i32 0
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}
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declare i32 @foo(i8*)
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