122b0220fd
The data layout strings do not have any effect on llc tests and will become misleadingly out of date as we continue to update the canonical data layout, so remove them from the tests. Differential Revision: https://reviews.llvm.org/D105842
31 lines
1.2 KiB
LLVM
31 lines
1.2 KiB
LLVM
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s
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; Regression test for an issue with patterns like the following:
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;
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; t101: v4i32 = BUILD_VECTOR t99, t99, t99, t99
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; t92: i32 = extract_vector_elt t101, Constant:i32<0>
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; t89: i32 = sign_extend_inreg t92, ValueType:ch:i8
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;
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; Notice that the sign_extend_inreg has source value type i8 but the
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; extracted vector has type v4i32. There are no ISel patterns that
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; handle mismatched types like this, so we insert a bitcast before the
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; extract. This was previously an ISel failure. This test case is
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; reduced from a private user bug report, and the vector extracts are
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; optimized out via subsequent DAG combines.
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: foo:
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; CHECK: .functype foo (i32) -> ()
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; Implementation omitted...
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; CHECK: return
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define void @foo(<4 x i8>* %p) {
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%1 = load <4 x i8>, <4 x i8>* %p
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%2 = sitofp <4 x i8> %1 to <4 x double>
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%3 = fmul <4 x double> zeroinitializer, %2
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%4 = fadd <4 x double> %3, zeroinitializer
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%5 = fptrunc <4 x double> %4 to <4 x float>
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store <4 x float> %5, <4 x float>* undef
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ret void
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}
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