122b0220fd
The data layout strings do not have any effect on llc tests and will become misleadingly out of date as we continue to update the canonical data layout, so remove them from the tests. Differential Revision: https://reviews.llvm.org/D105842
30 lines
1.2 KiB
LLVM
30 lines
1.2 KiB
LLVM
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
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; Test that a splat shuffle of an fp-to-int bitcasted vector correctly
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; optimizes and lowers to a single splat instruction. Without a custom
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; DAG combine, this ends up doing both a splat and a shuffle.
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: f32x4_splat:
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; CHECK-NEXT: .functype f32x4_splat (f32) -> (v128){{$}}
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; CHECK-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: return $pop[[R]]{{$}}
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define <4 x i32> @f32x4_splat(float %x) {
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%vecinit = insertelement <4 x float> undef, float %x, i32 0
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%a = bitcast <4 x float> %vecinit to <4 x i32>
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%b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> zeroinitializer
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ret <4 x i32> %b
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}
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; CHECK-LABEL: not_a_vec:
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; CHECK-NEXT: .functype not_a_vec (i64, i64) -> (v128){{$}}
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; CHECK-NEXT: i64x2.splat $push[[L1:[0-9]+]]=, $0{{$}}
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; CHECK-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $pop[[L1]], $2, 0, 1, 2, 3
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; CHECK-NEXT: return $pop[[R]]
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define <4 x i32> @not_a_vec(i128 %x) {
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%a = bitcast i128 %x to <4 x i32>
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%b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> zeroinitializer
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ret <4 x i32> %b
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}
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