122b0220fd
The data layout strings do not have any effect on llc tests and will become misleadingly out of date as we continue to update the canonical data layout, so remove them from the tests. Differential Revision: https://reviews.llvm.org/D105842
31 lines
1.0 KiB
LLVM
31 lines
1.0 KiB
LLVM
; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
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; Test that UMULO works correctly on 64-bit operands.
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target triple = "wasm32-unknown-unknown"
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; CHECK-LABEL: _ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE:
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; CHECK: __multi3
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; Function Attrs: inlinehint
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define void @"_ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE"(i64, i64) unnamed_addr #0 {
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start:
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%2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)
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%3 = extractvalue { i64, i1 } %2, 0
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store i64 %3, i64* undef
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unreachable
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}
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; Function Attrs: nounwind readnone speculatable
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declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1
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attributes #0 = { inlinehint }
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attributes #1 = { nounwind readnone speculatable }
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; CHECK-LABEL: wut:
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; CHECK: call __multi3, $2, $0, $pop0, $1, $pop7
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; CHECK: i64.load $0=, 8($2)
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define i1 @wut(i64, i64) {
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start:
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%2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)
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%3 = extractvalue { i64, i1 } %2, 1
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ret i1 %3
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}
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