0aef747b84
The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
393 lines
13 KiB
LLVM
393 lines
13 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; bswap should be constant folded when it is passed a constant argument
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; RUN: llc < %s -mtriple=i686-- -mcpu=i686 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK64
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declare i16 @llvm.bswap.i16(i16)
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declare i32 @llvm.bswap.i32(i32)
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declare i64 @llvm.bswap.i64(i64)
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define i16 @W(i16 %A) {
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; CHECK-LABEL: W:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: rolw $8, %ax
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; CHECK-NEXT: retl
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;
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; CHECK64-LABEL: W:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: movl %edi, %eax
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; CHECK64-NEXT: rolw $8, %ax
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; CHECK64-NEXT: # kill: def $ax killed $ax killed $eax
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; CHECK64-NEXT: retq
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%Z = call i16 @llvm.bswap.i16( i16 %A ) ; <i16> [#uses=1]
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ret i16 %Z
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}
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define dso_local i32 @X(i32 %A) {
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; CHECK-LABEL: X:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: bswapl %eax
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; CHECK-NEXT: retl
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;
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; CHECK64-LABEL: X:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: movl %edi, %eax
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; CHECK64-NEXT: bswapl %eax
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; CHECK64-NEXT: retq
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%Z = call i32 @llvm.bswap.i32( i32 %A ) ; <i32> [#uses=1]
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ret i32 %Z
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}
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define i64 @Y(i64 %A) {
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; CHECK-LABEL: Y:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: bswapl %eax
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; CHECK-NEXT: bswapl %edx
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; CHECK-NEXT: retl
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;
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; CHECK64-LABEL: Y:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: movq %rdi, %rax
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; CHECK64-NEXT: bswapq %rax
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; CHECK64-NEXT: retq
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%Z = call i64 @llvm.bswap.i64( i64 %A ) ; <i64> [#uses=1]
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ret i64 %Z
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}
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; This isn't really a bswap test, but the potential probem is
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; easier to see with bswap vs. other ops. The transform in
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; question starts with a bitwise logic op and tries to hoist
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; those ahead of other ops. But that's not generally profitable
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; when the other ops have other uses (and it might not be safe
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; either due to unconstrained instruction count growth).
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define dso_local i32 @bswap_multiuse(i32 %x, i32 %y, i32* %p1, i32* %p2) nounwind {
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; CHECK-LABEL: bswap_multiuse:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: bswapl %esi
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; CHECK-NEXT: bswapl %eax
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; CHECK-NEXT: movl %esi, (%edx)
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; CHECK-NEXT: movl %eax, (%ecx)
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; CHECK-NEXT: orl %esi, %eax
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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;
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; CHECK64-LABEL: bswap_multiuse:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: movl %esi, %eax
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; CHECK64-NEXT: bswapl %edi
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; CHECK64-NEXT: bswapl %eax
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; CHECK64-NEXT: movl %edi, (%rdx)
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; CHECK64-NEXT: movl %eax, (%rcx)
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; CHECK64-NEXT: orl %edi, %eax
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; CHECK64-NEXT: retq
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%xt = call i32 @llvm.bswap.i32(i32 %x)
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%yt = call i32 @llvm.bswap.i32(i32 %y)
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store i32 %xt, i32* %p1
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store i32 %yt, i32* %p2
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%r = or i32 %xt, %yt
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ret i32 %r
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}
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; rdar://9164521
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define dso_local i32 @test1(i32 %a) nounwind readnone {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: bswapl %eax
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; CHECK-NEXT: shrl $16, %eax
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; CHECK-NEXT: retl
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;
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; CHECK64-LABEL: test1:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: movl %edi, %eax
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; CHECK64-NEXT: bswapl %eax
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; CHECK64-NEXT: shrl $16, %eax
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; CHECK64-NEXT: retq
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%and = lshr i32 %a, 8
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%shr3 = and i32 %and, 255
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%and2 = shl i32 %a, 8
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%shl = and i32 %and2, 65280
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%or = or i32 %shr3, %shl
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ret i32 %or
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}
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define dso_local i32 @test2(i32 %a) nounwind readnone {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: bswapl %eax
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; CHECK-NEXT: sarl $16, %eax
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; CHECK-NEXT: retl
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;
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; CHECK64-LABEL: test2:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: movl %edi, %eax
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; CHECK64-NEXT: bswapl %eax
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; CHECK64-NEXT: sarl $16, %eax
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; CHECK64-NEXT: retq
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%and = lshr i32 %a, 8
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%shr4 = and i32 %and, 255
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%and2 = shl i32 %a, 8
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%or = or i32 %shr4, %and2
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%sext = shl i32 %or, 16
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%conv3 = ashr exact i32 %sext, 16
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ret i32 %conv3
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}
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@var8 = dso_local global i8 0
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@var16 = dso_local global i16 0
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; The "shl" below can move bits into the high parts of the value, so the
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; operation is not a "bswap, shr" pair.
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; rdar://problem/14814049
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define i64 @not_bswap() {
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; CHECK-LABEL: not_bswap:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzwl var16, %eax
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: shrl $8, %ecx
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; CHECK-NEXT: shll $8, %eax
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; CHECK-NEXT: orl %ecx, %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: retl
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;
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; CHECK64-LABEL: not_bswap:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: movzwl var16(%rip), %eax
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; CHECK64-NEXT: movq %rax, %rcx
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; CHECK64-NEXT: shrq $8, %rcx
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; CHECK64-NEXT: shlq $8, %rax
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; CHECK64-NEXT: orq %rcx, %rax
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; CHECK64-NEXT: retq
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%init = load i16, i16* @var16
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%big = zext i16 %init to i64
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%hishifted = lshr i64 %big, 8
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%loshifted = shl i64 %big, 8
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%notswapped = or i64 %hishifted, %loshifted
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ret i64 %notswapped
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}
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; This time, the lshr (and subsequent or) is completely useless. While it's
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; technically correct to convert this into a "bswap, shr", it's suboptimal. A
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; simple shl works better.
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define i64 @not_useful_bswap() {
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; CHECK-LABEL: not_useful_bswap:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzbl var8, %eax
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; CHECK-NEXT: shll $8, %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: retl
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;
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; CHECK64-LABEL: not_useful_bswap:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: movzbl var8(%rip), %eax
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; CHECK64-NEXT: shlq $8, %rax
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; CHECK64-NEXT: retq
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%init = load i8, i8* @var8
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%big = zext i8 %init to i64
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%hishifted = lshr i64 %big, 8
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%loshifted = shl i64 %big, 8
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%notswapped = or i64 %hishifted, %loshifted
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ret i64 %notswapped
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}
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; Finally, it *is* OK to just mask off the shl if we know that the value is zero
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; beyond 16 bits anyway. This is a legitimate bswap.
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define i64 @finally_useful_bswap() {
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; CHECK-LABEL: finally_useful_bswap:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzwl var16, %eax
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; CHECK-NEXT: bswapl %eax
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; CHECK-NEXT: shrl $16, %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: retl
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;
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; CHECK64-LABEL: finally_useful_bswap:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: movzwl var16(%rip), %eax
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; CHECK64-NEXT: bswapq %rax
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; CHECK64-NEXT: shrq $48, %rax
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; CHECK64-NEXT: retq
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%init = load i16, i16* @var16
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%big = zext i16 %init to i64
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%hishifted = lshr i64 %big, 8
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%lomasked = and i64 %big, 255
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%loshifted = shl i64 %lomasked, 8
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%swapped = or i64 %hishifted, %loshifted
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ret i64 %swapped
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}
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; Make sure we don't assert during type legalization promoting a large
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; bswap due to the need for a large shift that won't fit in the i8 returned
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; from getShiftAmountTy.
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define i528 @large_promotion(i528 %A) nounwind {
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; CHECK-LABEL: large_promotion:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: subl $44, %esp
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: bswapl %eax
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; CHECK-NEXT: bswapl %ecx
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; CHECK-NEXT: shrdl $16, %ecx, %eax
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; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: bswapl %edx
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; CHECK-NEXT: shrdl $16, %edx, %ecx
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; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: bswapl %esi
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; CHECK-NEXT: shrdl $16, %esi, %edx
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; CHECK-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: bswapl %edi
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; CHECK-NEXT: shrdl $16, %edi, %esi
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; CHECK-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: bswapl %ebx
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; CHECK-NEXT: shrdl $16, %ebx, %edi
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; CHECK-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: bswapl %ebp
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; CHECK-NEXT: shrdl $16, %ebp, %ebx
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; CHECK-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: bswapl %ecx
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; CHECK-NEXT: shrdl $16, %ecx, %ebp
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; CHECK-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: bswapl %eax
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; CHECK-NEXT: shrdl $16, %eax, %ecx
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; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: bswapl %ecx
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; CHECK-NEXT: shrdl $16, %ecx, %eax
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; CHECK-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: bswapl %eax
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; CHECK-NEXT: shrdl $16, %eax, %ecx
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; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; CHECK-NEXT: bswapl %ebp
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; CHECK-NEXT: shrdl $16, %ebp, %eax
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; CHECK-NEXT: movl %eax, (%esp) # 4-byte Spill
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; CHECK-NEXT: bswapl %ebx
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; CHECK-NEXT: shrdl $16, %ebx, %ebp
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi
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; CHECK-NEXT: bswapl %esi
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; CHECK-NEXT: shrdl $16, %esi, %ebx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: bswapl %edx
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; CHECK-NEXT: shrdl $16, %edx, %esi
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: bswapl %ecx
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; CHECK-NEXT: shrdl $16, %ecx, %edx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edi
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; CHECK-NEXT: bswapl %edi
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; CHECK-NEXT: shrdl $16, %edi, %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %ecx, 60(%eax)
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; CHECK-NEXT: movl %edx, 56(%eax)
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; CHECK-NEXT: movl %esi, 52(%eax)
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; CHECK-NEXT: movl %ebx, 48(%eax)
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; CHECK-NEXT: movl %ebp, 44(%eax)
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; CHECK-NEXT: movl (%esp), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 40(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 36(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 32(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 28(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 24(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 20(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 16(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 12(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 8(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, 4(%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: movl %ecx, (%eax)
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; CHECK-NEXT: shrl $16, %edi
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; CHECK-NEXT: movw %di, 64(%eax)
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; CHECK-NEXT: addl $44, %esp
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: popl %ebx
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: retl $4
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;
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; CHECK64-LABEL: large_promotion:
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; CHECK64: # %bb.0:
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; CHECK64-NEXT: pushq %rbx
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; CHECK64-NEXT: movq %rdi, %rax
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; CHECK64-NEXT: movq {{[0-9]+}}(%rsp), %rbx
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; CHECK64-NEXT: movq {{[0-9]+}}(%rsp), %r11
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; CHECK64-NEXT: movq {{[0-9]+}}(%rsp), %rdi
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; CHECK64-NEXT: movq {{[0-9]+}}(%rsp), %r10
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; CHECK64-NEXT: bswapq %r10
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; CHECK64-NEXT: bswapq %rdi
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; CHECK64-NEXT: shrdq $48, %rdi, %r10
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; CHECK64-NEXT: bswapq %r11
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; CHECK64-NEXT: shrdq $48, %r11, %rdi
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; CHECK64-NEXT: bswapq %rbx
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; CHECK64-NEXT: shrdq $48, %rbx, %r11
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; CHECK64-NEXT: bswapq %r9
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; CHECK64-NEXT: shrdq $48, %r9, %rbx
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; CHECK64-NEXT: bswapq %r8
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; CHECK64-NEXT: shrdq $48, %r8, %r9
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; CHECK64-NEXT: bswapq %rcx
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; CHECK64-NEXT: shrdq $48, %rcx, %r8
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; CHECK64-NEXT: bswapq %rdx
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; CHECK64-NEXT: shrdq $48, %rdx, %rcx
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; CHECK64-NEXT: bswapq %rsi
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; CHECK64-NEXT: shrdq $48, %rsi, %rdx
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; CHECK64-NEXT: shrq $48, %rsi
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; CHECK64-NEXT: movq %rdx, 56(%rax)
|
|
; CHECK64-NEXT: movq %rcx, 48(%rax)
|
|
; CHECK64-NEXT: movq %r8, 40(%rax)
|
|
; CHECK64-NEXT: movq %r9, 32(%rax)
|
|
; CHECK64-NEXT: movq %rbx, 24(%rax)
|
|
; CHECK64-NEXT: movq %r11, 16(%rax)
|
|
; CHECK64-NEXT: movq %rdi, 8(%rax)
|
|
; CHECK64-NEXT: movq %r10, (%rax)
|
|
; CHECK64-NEXT: movw %si, 64(%rax)
|
|
; CHECK64-NEXT: popq %rbx
|
|
; CHECK64-NEXT: retq
|
|
%Z = call i528 @llvm.bswap.i528(i528 %A)
|
|
ret i528 %Z
|
|
}
|
|
declare i528 @llvm.bswap.i528(i528)
|