0aef747b84
The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
57 lines
1.8 KiB
LLVM
57 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown- -mcpu=core2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown- -mcpu=core2 | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=i686-unknown- -mcpu=i486 | FileCheck %s --check-prefix=I486
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; RUN: llc < %s -mtriple=i686-unknown- -mcpu=znver1 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=i686-unknown- -mcpu=lakemont | FileCheck %s --check-prefix=X86
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; Basic 64-bit cmpxchg
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define void @t1(i64* nocapture %p) nounwind ssp {
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; X86-LABEL: t1:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: xorl %ecx, %ecx
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; X86-NEXT: movl $1, %ebx
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; X86-NEXT: lock cmpxchg8b (%esi)
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %ebx
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; X86-NEXT: retl
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;
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; X64-LABEL: t1:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movl $1, %ecx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: lock cmpxchgq %rcx, (%rdi)
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; X64-NEXT: retq
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;
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; I486-LABEL: t1:
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; I486: # %bb.0: # %entry
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; I486-NEXT: pushl %ebp
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; I486-NEXT: movl %esp, %ebp
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; I486-NEXT: andl $-8, %esp
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; I486-NEXT: subl $8, %esp
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; I486-NEXT: movl 8(%ebp), %eax
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; I486-NEXT: movl $0, {{[0-9]+}}(%esp)
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; I486-NEXT: movl $0, (%esp)
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; I486-NEXT: movl %esp, %ecx
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; I486-NEXT: pushl $5
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; I486-NEXT: pushl $5
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; I486-NEXT: pushl $0
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; I486-NEXT: pushl $1
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; I486-NEXT: pushl %ecx
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; I486-NEXT: pushl %eax
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; I486-NEXT: calll __atomic_compare_exchange_8@PLT
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; I486-NEXT: addl $24, %esp
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; I486-NEXT: movl %ebp, %esp
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; I486-NEXT: popl %ebp
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; I486-NEXT: retl
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entry:
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%r = cmpxchg i64* %p, i64 0, i64 1 seq_cst seq_cst
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ret void
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}
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