Files
clang-p2996/llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir
Alexandru Octavian Butiu e90c6f5596 [MachineCopyPropagation] Fix differences in code gen when compiling with -g
Fixes bugs [[ https://bugs.llvm.org/show_bug.cgi?id=50580 | 50580 ]] and [[ https://bugs.llvm.org/show_bug.cgi?id=49446 | 49446  ]]

When compiling with -g "DBG_VALUE <reg>"  instructions are added in the MIR, if such a instruction is inserted between instructions that use <reg> then MachineCopyPropagation invalidates <reg> , this causes some copies  to not be propagated and causes differences in code generation (ex bugs 50580 and 49446 ).  DBG_VALUE instructions should be ignored  since they don't actually modify the register.

Reviewed By: lkail

Differential Revision: https://reviews.llvm.org/D104394
2021-07-02 19:27:06 +08:00

21 lines
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# RUN: llc -mtriple=i686-- -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s
---
# Test that machine copy propagation ignores DBG_VALUE and DBL_VALUE_LIST and updates it.
# CHECK-LABEL: name: foo
# CHECK: bb.0:
# CHECK-NEXT: $rax = MOV64ri 31
# CHECK-NEXT: DBG_VALUE $rax
# CHECK-NEXT: DBG_VALUE_LIST 0, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 4, DW_OP_mul, DW_OP_plus, DW_OP_stack_value), $rax, 0, 0
# CHECK-NEXT: RETQ implicit killed $rax
name: foo
body: |
bb.0:
renamable $rcx = MOV64ri 31
DBG_VALUE $rcx, 0, 0, 0, 0
DBG_VALUE_LIST 0, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_constu, 4, DW_OP_mul, DW_OP_plus, DW_OP_stack_value), $rcx, 0, 0
$rax = COPY killed renamable $rcx
RETQ implicit killed $rax
...