0aef747b84
The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
125 lines
4.5 KiB
LLVM
125 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X64
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; According to https://bugs.llvm.org/show_bug.cgi?id=32329 it checks DAG ISEL failure on SKX target
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%struct.AA = type { i24, [4 x i8] }
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@obj = external dso_local local_unnamed_addr global %struct.AA, align 8
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@var_27 = external dso_local local_unnamed_addr constant i8, align 1
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@var_2 = external dso_local local_unnamed_addr constant i16, align 2
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@var_24 = external dso_local local_unnamed_addr constant i64, align 8
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@var_310 = external dso_local local_unnamed_addr global i64, align 8
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@var_50 = external dso_local local_unnamed_addr global i64, align 8
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@var_205 = external dso_local local_unnamed_addr global i8, align 1
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@var_218 = external dso_local local_unnamed_addr global i8, align 1
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define void @foo() local_unnamed_addr {
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; X86-LABEL: foo:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: pushl %ebx
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; X86-NEXT: .cfi_def_cfa_offset 12
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; X86-NEXT: pushl %edi
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; X86-NEXT: .cfi_def_cfa_offset 16
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; X86-NEXT: pushl %esi
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; X86-NEXT: .cfi_def_cfa_offset 20
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; X86-NEXT: .cfi_offset %esi, -20
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; X86-NEXT: .cfi_offset %edi, -16
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; X86-NEXT: .cfi_offset %ebx, -12
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; X86-NEXT: .cfi_offset %ebp, -8
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; X86-NEXT: movsbl var_27, %eax
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; X86-NEXT: movzwl var_2, %esi
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; X86-NEXT: movl var_310, %ecx
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; X86-NEXT: imull %eax, %ecx
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; X86-NEXT: addl var_24, %ecx
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; X86-NEXT: movl $4194303, %edi # imm = 0x3FFFFF
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; X86-NEXT: andl obj, %edi
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; X86-NEXT: leal (%edi,%edi), %edx
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; X86-NEXT: subl %eax, %edx
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; X86-NEXT: movl %edx, %ebx
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; X86-NEXT: subl %esi, %ebx
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; X86-NEXT: imull %ebx, %ecx
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; X86-NEXT: addb $113, %cl
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; X86-NEXT: movl $9, %esi
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; X86-NEXT: xorl %ebp, %ebp
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; X86-NEXT: shldl %cl, %esi, %ebp
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; X86-NEXT: shll %cl, %esi
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; X86-NEXT: testb $32, %cl
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; X86-NEXT: cmovnel %esi, %ebp
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; X86-NEXT: movl $0, %ecx
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; X86-NEXT: cmovnel %ecx, %esi
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; X86-NEXT: cmpl %edi, %ebx
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; X86-NEXT: movl %ebp, var_50+4
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; X86-NEXT: movl %esi, var_50
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; X86-NEXT: setge var_205
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; X86-NEXT: imull %eax, %edx
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; X86-NEXT: movb %dl, var_218
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; X86-NEXT: popl %esi
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; X86-NEXT: .cfi_def_cfa_offset 16
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; X86-NEXT: popl %edi
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; X86-NEXT: .cfi_def_cfa_offset 12
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; X86-NEXT: popl %ebx
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: popl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 4
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; X86-NEXT: retl
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;
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; X64-LABEL: foo:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movsbl var_27(%rip), %r9d
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; X64-NEXT: movzwl var_2(%rip), %r8d
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; X64-NEXT: movl var_310(%rip), %ecx
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; X64-NEXT: imull %r9d, %ecx
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; X64-NEXT: addl var_24(%rip), %ecx
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; X64-NEXT: movl $4194303, %esi # imm = 0x3FFFFF
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; X64-NEXT: andl obj(%rip), %esi
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; X64-NEXT: leal (%rsi,%rsi), %edi
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; X64-NEXT: subl %r9d, %edi
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; X64-NEXT: movl %edi, %edx
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; X64-NEXT: subl %r8d, %edx
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; X64-NEXT: imull %edx, %ecx
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; X64-NEXT: addb $113, %cl
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; X64-NEXT: movl $9, %eax
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; X64-NEXT: # kill: def $cl killed $cl killed $ecx
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; X64-NEXT: shlq %cl, %rax
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; X64-NEXT: movq %rax, var_50(%rip)
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; X64-NEXT: cmpl %esi, %edx
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; X64-NEXT: setge var_205(%rip)
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; X64-NEXT: imull %r9d, %edi
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; X64-NEXT: movb %dil, var_218(%rip)
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; X64-NEXT: retq
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entry:
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%bf.load = load i32, i32* bitcast (%struct.AA* @obj to i32*), align 8
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%bf.clear = shl i32 %bf.load, 1
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%add = and i32 %bf.clear, 8388606
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%0 = load i8, i8* @var_27, align 1
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%conv5 = sext i8 %0 to i32
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%sub = sub nsw i32 %add, %conv5
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%1 = load i16, i16* @var_2, align 2
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%conv6 = zext i16 %1 to i32
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%sub7 = sub nsw i32 %sub, %conv6
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%conv8 = sext i32 %sub7 to i64
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%2 = load i64, i64* @var_24, align 8
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%3 = load i64, i64* @var_310, align 8
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%conv9 = sext i8 %0 to i64
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%mul = mul i64 %3, %conv9
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%add10 = add i64 %mul, %2
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%mul11 = mul i64 %add10, %conv8
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%sub12 = add i64 %mul11, 8662905354777116273
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%shl = shl i64 9, %sub12
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store i64 %shl, i64* @var_50, align 8
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%bf.clear14 = and i32 %bf.load, 4194303
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%add21 = shl nuw nsw i32 %bf.clear14, 1
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%sub23 = sub nsw i32 %add21, %conv5
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%sub25 = sub nsw i32 %sub23, %conv6
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%cmp = icmp sge i32 %sub25, %bf.clear14
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%conv30 = zext i1 %cmp to i8
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store i8 %conv30, i8* @var_205, align 1
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%mul43 = mul nsw i32 %sub, %conv5
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%conv44 = trunc i32 %mul43 to i8
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store i8 %conv44, i8* @var_218, align 1
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ret void
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}
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