0aef747b84
The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
54 lines
1.7 KiB
LLVM
54 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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@var_3 = external dso_local global i16, align 2
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@var_13 = external dso_local global i16, align 2
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@var_212 = external dso_local global i64, align 8
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define void @pr34127() {
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; CHECK-LABEL: pr34127:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movzwl var_3(%rip), %eax
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; CHECK-NEXT: movzwl var_13(%rip), %ecx
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; CHECK-NEXT: andl %eax, %ecx
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: andl %eax, %ecx
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; CHECK-NEXT: movzwl %cx, %ecx
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; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: sete %dl
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; CHECK-NEXT: andl %eax, %edx
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; CHECK-NEXT: movq %rdx, var_212(%rip)
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; CHECK-NEXT: movw $0, (%rax)
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; CHECK-NEXT: retq
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entry:
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%a = alloca i32, align 4
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%0 = load i16, i16* @var_3, align 2
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%conv = zext i16 %0 to i32
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%1 = load i16, i16* @var_3, align 2
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%conv1 = zext i16 %1 to i32
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%2 = load i16, i16* @var_13, align 2
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%conv2 = zext i16 %2 to i32
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%and = and i32 %conv1, %conv2
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%and3 = and i32 %conv, %and
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store i32 %and3, i32* %a, align 4
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%3 = load i16, i16* @var_3, align 2
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%conv4 = zext i16 %3 to i32
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%4 = load i16, i16* @var_3, align 2
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%conv5 = zext i16 %4 to i32
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%5 = load i16, i16* @var_13, align 2
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%conv6 = zext i16 %5 to i32
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%and7 = and i32 %conv5, %conv6
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%and8 = and i32 %conv4, %and7
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%tobool = icmp ne i32 %and8, 0
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%lnot = xor i1 %tobool, true
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%conv9 = zext i1 %lnot to i32
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%6 = load i16, i16* @var_3, align 2
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%conv10 = zext i16 %6 to i32
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%and11 = and i32 %conv9, %conv10
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%conv12 = sext i32 %and11 to i64
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store i64 %conv12, i64* @var_212, align 8
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%conv14 = zext i1 undef to i16
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store i16 %conv14, i16* undef, align 2
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ret void
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}
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