The motivation is that the update script has at least two deviations (`<...>@GOT`/`<...>@PLT`/ and not hiding pointer arithmetics) from what pretty much all the checklines were generated with, and most of the tests are still not updated, so each time one of the non-up-to-date tests is updated to see the effect of the code change, there is a lot of noise. Instead of having to deal with that each time, let's just deal with everything at once. This has been done via: ``` cd llvm-project/llvm/test/CodeGen/X86 grep -rl "; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py" | xargs -L1 <...>/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary <...>/llvm-project/build/bin/llc ``` Not all tests were regenerated, however.
42 lines
1.4 KiB
LLVM
42 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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;RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=slow-incdec | FileCheck %s
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@var_21 = external dso_local constant i32, align 4
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@var_29 = external dso_local constant i8, align 1
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@var_390 = external dso_local global i32, align 4
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@var_11 = external dso_local constant i8, align 1
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@var_370 = external dso_local global i8, align 1
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; Function Attrs: noinline nounwind optnone uwtable
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define void @_Z3foov() {
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; CHECK-LABEL: _Z3foov:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movsbl var_29(%rip), %eax
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: cmpl %eax, var_21(%rip)
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; CHECK-NEXT: setb %cl
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; CHECK-NEXT: movl %ecx, var_390(%rip)
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; CHECK-NEXT: movb var_11(%rip), %al
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; CHECK-NEXT: movb %al, var_370(%rip)
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; CHECK-NEXT: retq
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entry:
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%0 = load i32, i32* @var_21, align 4
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%1 = load i8, i8* @var_29, align 1
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%conv = sext i8 %1 to i32
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%sub = sub nsw i32 0, %conv
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%cmp = icmp ult i32 %0, %sub
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%conv1 = zext i1 %cmp to i32
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%add = add nsw i32 %conv1, -1
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%conv2 = trunc i32 %add to i8
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%tobool = icmp ne i8 %conv2, 0
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%lnot = xor i1 %tobool, true
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%conv3 = zext i1 %lnot to i32
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store i32 %conv3, i32* @var_390, align 4
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%2 = load i8, i8* @var_11, align 1
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%conv4 = sext i8 %2 to i16
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%conv5 = trunc i16 %conv4 to i8
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store i8 %conv5, i8* @var_370, align 1
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ret void
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}
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