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clang-p2996/llvm/test/CodeGen/X86/update-terminator.mir
Craig Topper 80aa2290fb [X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.

Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.

Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon

Reviewed By: RKSimon

Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60228

llvm-svn: 357802
2019-04-05 19:28:09 +00:00

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1.8 KiB
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# RUN: llc -mtriple=x86_64-- -verify-machineinstrs -run-pass block-placement -o - %s | FileCheck %s
# Check the conditional jump in bb.1 is changed to unconditional after block placement swaps bb.2 and bb.3.
--- |
@a = external global i16
@b = external global i32
declare void @dummy1()
declare void @dummy2()
declare void @dummy3()
; Function Attrs: nounwind
define void @f2() {
br i1 undef, label %bb1, label %bb3
bb1:
call void @dummy1()
call void @dummy1()
call void @dummy1()
br i1 undef, label %bb2, label %bb2
bb2:
call void @dummy2()
call void @dummy2()
call void @dummy2()
br label %bb4
bb3:
call void @dummy3()
call void @dummy3()
call void @dummy3()
br label %bb2
bb4:
ret void
}
...
---
# CHECK-LABEL: name: f2
# CHECK: bb.1:
# CHECK: JMP_1 %bb.2
# CHECK: bb.3:
# CHECK: bb.2:
name: f2
body: |
bb.0 (%ir-block.0):
successors: %bb.1(50), %bb.3(50)
JCC_1 %bb.1, 2, implicit $eflags
JMP_1 %bb.3
bb.1:
successors: %bb.2(100)
CALL64pcrel32 @dummy1, csr_64, implicit $rsp, implicit-def $rsp
CALL64pcrel32 @dummy1, csr_64, implicit $rsp, implicit-def $rsp
CALL64pcrel32 @dummy1, csr_64, implicit $rsp, implicit-def $rsp
JCC_1 %bb.2, 5, implicit $eflags
bb.2:
successors: %bb.4(100)
CALL64pcrel32 @dummy2, csr_64, implicit $rsp, implicit-def $rsp
CALL64pcrel32 @dummy2, csr_64, implicit $rsp, implicit-def $rsp
CALL64pcrel32 @dummy2, csr_64, implicit $rsp, implicit-def $rsp
JMP_1 %bb.4
bb.3:
successors: %bb.2(100)
CALL64pcrel32 @dummy3, csr_64, implicit $rsp, implicit-def $rsp
CALL64pcrel32 @dummy3, csr_64, implicit $rsp, implicit-def $rsp
CALL64pcrel32 @dummy3, csr_64, implicit $rsp, implicit-def $rsp
JMP_1 %bb.2
bb.4:
RETQ
...