773771ba38
Register allocation may spill virtual registers to the stack, which can increase alignment requirements of the stack frame. If the the function did not require stack realignment before register allocation, the registers required to do so may not be reserved/available. This results in a stack frame that requires realignment but can not be realigned. Instead, only increase the alignment of the stack if we are still able to realign. The register SpillAlignment will be ignored if we can't realign, and the backend will be responsible for emitting the correct unaligned loads and stores. This seems to be the assumed behaviour already, e.g. ARMBaseInstrInfo::storeRegToStackSlot and X86InstrInfo::storeRegToStackSlot are both `canRealignStack` aware. Differential Revision: https://reviews.llvm.org/D103602
95 lines
3.5 KiB
LLVM
95 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
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; In the following 4 tests, the existing call to VZU/VZA ensures clean state before
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; the call to the unknown, so we don't need to insert a second VZU at that point.
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define <4 x float> @zeroupper_v4f32(<8 x float> *%x, <8 x float> %y) nounwind {
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; CHECK-LABEL: zeroupper_v4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: subq $32, %rsp
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; CHECK-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
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; CHECK-NEXT: movq %rdi, %rbx
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: callq the_unknown@PLT
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; CHECK-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
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; CHECK-NEXT: vaddps (%rbx), %ymm0, %ymm0
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: addq $32, %rsp
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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call void @llvm.x86.avx.vzeroupper()
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call void @the_unknown()
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%loadx = load <8 x float>, <8 x float> *%x, align 32
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%sum = fadd <8 x float> %loadx, %y
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%lo = shufflevector <8 x float> %sum, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%hi = shufflevector <8 x float> %sum, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%res = fadd <4 x float> %lo, %hi
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ret <4 x float> %res
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}
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define <8 x float> @zeroupper_v8f32(<8 x float> %x) nounwind {
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; CHECK-LABEL: zeroupper_v8f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq $40, %rsp
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; CHECK-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: callq the_unknown@PLT
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; CHECK-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
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; CHECK-NEXT: addq $40, %rsp
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; CHECK-NEXT: retq
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call void @llvm.x86.avx.vzeroupper()
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call void @the_unknown()
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ret <8 x float> %x
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}
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define <4 x float> @zeroall_v4f32(<8 x float> *%x, <8 x float> %y) nounwind {
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; CHECK-LABEL: zeroall_v4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: subq $32, %rsp
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; CHECK-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
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; CHECK-NEXT: movq %rdi, %rbx
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; CHECK-NEXT: vzeroall
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; CHECK-NEXT: callq the_unknown@PLT
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; CHECK-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
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; CHECK-NEXT: vaddps (%rbx), %ymm0, %ymm0
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
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; CHECK-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: addq $32, %rsp
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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call void @llvm.x86.avx.vzeroall()
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call void @the_unknown()
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%loadx = load <8 x float>, <8 x float> *%x, align 32
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%sum = fadd <8 x float> %loadx, %y
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%lo = shufflevector <8 x float> %sum, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%hi = shufflevector <8 x float> %sum, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%res = fadd <4 x float> %lo, %hi
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ret <4 x float> %res
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}
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define <8 x float> @zeroall_v8f32(<8 x float> %x) nounwind {
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; CHECK-LABEL: zeroall_v8f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subq $40, %rsp
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; CHECK-NEXT: vmovups %ymm0, (%rsp) # 32-byte Spill
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; CHECK-NEXT: vzeroall
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; CHECK-NEXT: callq the_unknown@PLT
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; CHECK-NEXT: vmovups (%rsp), %ymm0 # 32-byte Reload
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; CHECK-NEXT: addq $40, %rsp
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; CHECK-NEXT: retq
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call void @llvm.x86.avx.vzeroall()
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call void @the_unknown()
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ret <8 x float> %x
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}
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declare void @llvm.x86.avx.vzeroupper() nounwind readnone
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declare void @llvm.x86.avx.vzeroall() nounwind readnone
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declare void @the_unknown() nounwind
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