9f51f1b927
Add address sanitizer instrumentation support for accesses to global and constant address spaces in AMDGPU. It strictly avoids instrumenting the stack and assumes x86 as the host. Reviewed by: vitalybuka Differential Revision: https://reviews.llvm.org/D99071
52 lines
1.6 KiB
LLVM
52 lines
1.6 KiB
LLVM
; This test checks that we are not instrumenting direct inbound stack accesses.
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; RUN: opt < %s -asan -asan-module -enable-new-pm=0 -asan-opt-stack -S | FileCheck %s
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; RUN: opt < %s -passes='asan-pipeline' -asan-opt-stack -S | FileCheck %s
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; RUN: opt < %s -asan -asan-module -enable-new-pm=0 -asan-opt-stack -asan-mapping-scale=5 -S | FileCheck %s
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; RUN: opt < %s -passes='asan-pipeline' -asan-opt-stack -asan-mapping-scale=5 -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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;@sink = global i32* null, align 4
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; Ignore direct inbounds stack access.
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define void @foo() uwtable sanitize_address {
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entry:
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%a = alloca i32, align 4
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store i32 42, i32* %a, align 4
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ret void
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; CHECK-LABEL: define void @foo
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; CHECK-NOT: __asan_report
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; CHECK: ret void
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}
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; Don't ignore dynamic indexing.
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define void @baz(i64 %i) sanitize_address {
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entry:
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%a = alloca [10 x i32], align 4
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%e = getelementptr inbounds [10 x i32], [10 x i32]* %a, i32 0, i64 %i
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store i32 42, i32* %e, align 4
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ret void
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; CHECK-LABEL: define void @baz
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; CHECK: __asan_report
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; CHECK: ret void
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}
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define void @bar() sanitize_address {
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entry:
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%a = alloca [10 x i32], align 4
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%e = getelementptr inbounds [10 x i32], [10 x i32]* %a, i32 0, i64 12
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store i32 42, i32* %e, align 4
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ret void
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; CHECK-LABEL: define void @bar
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; CHECK: __asan_report
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; CHECK: ret void
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}
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define void @endoftests() sanitize_address {
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entry:
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ret void
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; CHECK-LABEL: define void @endoftests
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}
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